c5357940ab
Fix the stub in many way to correctly detect the STMP family and act upon that. Drop some unused commands and bump version. Rewrite the tool to allows scripting in lua and load the register description from an XML file using the regtools. Introduce a new tool to load and run code using the hwstub (either binary format or Rockbox additive scramble format). Also switch to an optimise version of the memcpy/move/set functions to correctly handle alignement issue (like writing a full word/half-word when possible for registers which is crucial) Change-Id: Id1d5cfe0b1b47e8b43900d32c5cd6eafae6414f6
118 lines
3.4 KiB
C
118 lines
3.4 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2012 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HWSTUB_SYSTEM__
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#define __HWSTUB_SYSTEM__
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#define IRQ_ENABLED 0x00
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#define IRQ_DISABLED 0x80
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#define IRQ_STATUS 0x80
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#define FIQ_ENABLED 0x00
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#define FIQ_DISABLED 0x40
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#define FIQ_STATUS 0x40
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#define IRQ_FIQ_ENABLED 0x00
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#define IRQ_FIQ_DISABLED 0xc0
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#define IRQ_FIQ_STATUS 0xc0
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#define HIGHEST_IRQ_LEVEL IRQ_DISABLED
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#define set_irq_level(status) \
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set_interrupt_status((status), IRQ_STATUS)
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#define set_fiq_status(status) \
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set_interrupt_status((status), FIQ_STATUS)
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#define disable_irq_save() \
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disable_interrupt_save(IRQ_STATUS)
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#define disable_fiq_save() \
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disable_interrupt_save(FIQ_STATUS)
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#define restore_irq(cpsr) \
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restore_interrupt(cpsr)
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#define restore_fiq(cpsr) \
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restore_interrupt(cpsr)
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#define disable_irq() \
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disable_interrupt(IRQ_STATUS)
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#define enable_irq() \
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enable_interrupt(IRQ_STATUS)
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#define disable_fiq() \
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disable_interrupt(FIQ_STATUS)
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#define enable_fiq() \
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enable_interrupt(FIQ_STATUS)
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static inline int set_interrupt_status(int status, int mask)
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{
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unsigned long cpsr;
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int oldstatus;
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/* Read the old levels and set the new ones */
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asm volatile (
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"mrs %1, cpsr \n"
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"bic %0, %1, %[mask] \n"
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"orr %0, %0, %2 \n"
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"msr cpsr_c, %0 \n"
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: "=&r,r"(cpsr), "=&r,r"(oldstatus)
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: "r,i"(status & mask), [mask]"i,i"(mask));
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return oldstatus;
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}
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static inline void restore_interrupt(int cpsr)
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{
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/* Set cpsr_c from value returned by disable_interrupt_save
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* or set_interrupt_status */
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asm volatile ("msr cpsr_c, %0" : : "r"(cpsr));
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}
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static inline void enable_interrupt(int mask)
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{
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/* Clear I and/or F disable bit */
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int tmp;
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asm volatile (
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"mrs %0, cpsr \n"
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"bic %0, %0, %1 \n"
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"msr cpsr_c, %0 \n"
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: "=&r"(tmp) : "i"(mask));
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}
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static inline void disable_interrupt(int mask)
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{
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/* Set I and/or F disable bit */
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int tmp;
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asm volatile (
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"mrs %0, cpsr \n"
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"orr %0, %0, %1 \n"
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"msr cpsr_c, %0 \n"
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: "=&r"(tmp) : "i"(mask));
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}
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static inline int disable_interrupt_save(int mask)
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{
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/* Set I and/or F disable bit and return old cpsr value */
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int cpsr, tmp;
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asm volatile (
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"mrs %1, cpsr \n"
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"orr %0, %1, %2 \n"
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"msr cpsr_c, %0 \n"
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: "=&r"(tmp), "=&r"(cpsr)
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: "i"(mask));
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return cpsr;
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}
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#endif /* __HWSTUB_SYSTEM__ */
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