18770dac2e
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29171 a1c6a512-1295-4272-9138-f99709370657
136 lines
4 KiB
C
136 lines
4 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Jens Arnold
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* Based on the work of Alan Korr and others
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef SYSTEM_TARGET_H
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#define SYSTEM_TARGET_H
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#define or_b(mask, address) \
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asm \
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("or.b %0,@(r0,gbr)" \
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: \
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: /* %0 */ I_CONSTRAINT((char)(mask)), \
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/* %1 */ "z"(address-GBR))
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#define and_b(mask, address) \
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asm \
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("and.b %0,@(r0,gbr)" \
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: \
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: /* %0 */ I_CONSTRAINT((char)(mask)), \
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/* %1 */ "z"(address-GBR))
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#define xor_b(mask, address) \
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asm \
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("xor.b %0,@(r0,gbr)" \
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: \
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: /* %0 */ I_CONSTRAINT((char)(mask)), \
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/* %1 */ "z"(address-GBR))
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/****************************************************************************
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* Interrupt level setting
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* The level is left shifted 4 bits
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****************************************************************************/
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#define HIGHEST_IRQ_LEVEL (15<<4)
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static inline int set_irq_level(int level)
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{
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int i;
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/* Read the old level and set the new one */
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/* Not volatile - will be optimized away if the return value isn't used */
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asm ("stc sr, %0" : "=r" (i));
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asm volatile ("ldc %0, sr" : : "r" (level));
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return i;
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}
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static inline void enable_irq(void)
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{
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int i;
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asm volatile ("mov %1, %0 \n" /* Save a constant load from RAM */
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"ldc %0, sr \n" : "=&r"(i) : "i"(0));
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}
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#define disable_irq() \
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((void)set_irq_level(HIGHEST_IRQ_LEVEL))
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#define disable_irq_save() \
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set_irq_level(HIGHEST_IRQ_LEVEL)
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#define restore_irq(i) \
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((void)set_irq_level(i))
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static inline uint16_t swap16_hw(uint16_t value)
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/*
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result[15..8] = value[ 7..0];
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result[ 7..0] = value[15..8];
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*/
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{
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uint16_t result;
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asm volatile ("swap.b\t%1,%0" : "=r"(result) : "r"(value));
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return result;
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}
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static inline uint32_t swaw32_hw(uint32_t value)
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/*
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result[31..16] = value[15.. 0];
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result[15.. 0] = value[31..16];
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*/
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{
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uint32_t result;
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asm volatile ("swap.w\t%1,%0" : "=r"(result) : "r"(value));
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return result;
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}
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static inline uint32_t swap32_hw(uint32_t value)
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/*
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result[31..24] = value[ 7.. 0];
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result[23..16] = value[15.. 8];
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result[15.. 8] = value[23..16];
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result[ 7.. 0] = value[31..24];
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*/
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{
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asm volatile ("swap.b\t%0,%0\n"
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"swap.w\t%0,%0\n"
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"swap.b\t%0,%0\n" : "+r"(value));
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return value;
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}
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static inline uint32_t swap_odd_even32_hw(uint32_t value)
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{
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/*
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result[31..24],[15.. 8] = value[23..16],[ 7.. 0]
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result[23..16],[ 7.. 0] = value[31..24],[15.. 8]
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*/
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asm volatile ("swap.b\t%0,%0\n"
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"swap.w\t%0,%0\n"
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"swap.b\t%0,%0\n"
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"swap.w\t%0,%0\n" : "+r"(value));
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return value;
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}
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extern const unsigned bit_n_table[32];
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#define BIT_N(n) ( \
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__builtin_constant_p(n) \
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? (1U << (n)) \
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: bit_n_table[n] \
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)
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#endif /* SYSTEM_TARGET_H */
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