cec6422ace
- Use unsigned bitfields in 'lcd_tgt_config' - Set DTIMES when using an 8-bit bus width - Allow using DMA big-endian mode - Provide an #ifdef to avoid stopping DMA in the middle of a frame - Correctly #ifdef LCD sleep code when target does not implement it Change-Id: I327c6b05223638b876d5ab62cb6e48f82e6d5fa5
113 lines
3.9 KiB
C
113 lines
3.9 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __LCD_X1000_H__
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#define __LCD_X1000_H__
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/* NOTICE: if adding LCD support for a new X1000 target, please take a look
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* at the implementation in case there's any difficulties; there may be some
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* parts that need adjusting. The X1000 LCD interface is poorly documented
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* and it might be necessary to change some settings by trial and error to
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* match the panel. */
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#include "clk-x1000.h"
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#include <stdbool.h>
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#define LCD_INSTR_CMD 0
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#define LCD_INSTR_DAT 1
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#define LCD_INSTR_UDELAY 2
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#define LCD_INSTR_END 3
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struct lcd_tgt_config {
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/* Data bus width, in bits */
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unsigned bus_width: 8;
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/* Command bus width, in bits */
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unsigned cmd_width: 8;
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/* 1 = use 6800 timings, 0 = use 8080 timings */
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unsigned use_6800_mode: 1;
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/* 1 = serial interface, 0 = parallel interface */
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unsigned use_serial: 1;
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/* Clock active edge: 0 = falling edge, 1 = rising edge */
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unsigned clk_polarity: 1;
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/* DC pin levels: 1 = data high, command low; 0 = data low, command high */
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unsigned dc_polarity: 1;
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/* WR pin level during idle: 1 = keep high; 0 = keep low */
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unsigned wr_polarity: 1;
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/* 1 to enable vsync, so DMA transfer is synchronized with TE signal */
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unsigned te_enable: 1;
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/* Active level of TE signal: 1 = high, 0 = low */
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unsigned te_polarity: 1;
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/* 1 = support narrow TE signal (<=3 pixel clocks); 0 = don't support */
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unsigned te_narrow: 1;
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/* 1 = big endian mode, 0 = little endian mode */
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unsigned big_endian: 1;
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/* Commands used to initiate a framebuffer write. Buffer must be
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* aligned to 64-byte boundary and size must be a multiple of 4,
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* regardless of the command bus width. */
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const void* dma_wr_cmd_buf;
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size_t dma_wr_cmd_size;
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};
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/* Static configuration for the target's LCD, must be defined by target. */
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extern const struct lcd_tgt_config lcd_tgt_config;
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/* Set the pixel clock. Valid clock sources are SCLK_A and MPLL. */
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extern void lcd_set_clock(x1000_clk_t clksrc, uint32_t freq);
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/* Execute a sequence of LCD commands. Should only be called from
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* lcd_tgt_ctl_enable() and lcd_tgt_ctl_sleep().
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*
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* The array should be a list of pairs (instr, arg), with LCD_INSTR_END
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* as the last entry.
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*
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* - LCD_INSTR_CMD, cmd: issue command write of 'cmd'
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* - LCD_INSTR_DAT, dat: issue data write of 'dat'
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* - LCD_INSTR_UDELAY, us: call udelay(us)
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*/
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extern void lcd_exec_commands(const uint32_t* cmdseq);
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/* Enable/disable the LCD controller.
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*
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* - On enabling: power on the LCD, set the pixel clock with lcd_set_clock(),
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* and use lcd_exec_commands() to send any needed initialization commands.
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*
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* - On disabling: use lcd_exec_commands() to send shutdown commands to the
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* controller and disable the LCD power supply.
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*/
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extern void lcd_tgt_enable(bool on);
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/* Enter or exit sleep mode to save power, normally by sending the necessary
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* commands with lcd_exec_commands().
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*/
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extern void lcd_tgt_sleep(bool sleep);
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#endif /* __LCD_X1000_H__ */
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