rockbox/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
Daniel Stenberg 2acc0ac542 Updated our source code header to explicitly mention that we are GPL v2 or
later. We still need to hunt down snippets used that are not. 1324 modified
files...
http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
2008-06-28 18:10:04 +00:00

51 lines
1.7 KiB
C

/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 by Greg White
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef SYSTEM_TARGET_H
#define SYSTEM_TARGET_H
#include "system-arm.h"
#include "mmu-arm.h"
#define CPUFREQ_DEFAULT 98784000
#define CPUFREQ_NORMAL 98784000
#define CPUFREQ_MAX 296352000
/* Functions to set and clear regiser bits atomically */
/* Set and clear register bits */
void s3c_regmod(volatile int *reg, unsigned int set, unsigned int clr);
/* Set register bits */
void s3c_regset(volatile int *reg, unsigned int mask);
/* Clear register bits */
void s3c_regclr(volatile int *reg, unsigned int mask);
#define HAVE_INVALIDATE_ICACHE
static inline void invalidate_icache(void)
{
clean_dcache();
asm volatile(
"mov r0, #0 \n"
"mcr p15, 0, r0, c7, c5, 0 \n"
: : : "r0"
);
}
#endif /* SYSTEM_TARGET_H */