2acc0ac542
later. We still need to hunt down snippets used that are not. 1324 modified files... http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
89 lines
3 KiB
C
89 lines
3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "avic-imx31.h"
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#include "spi-imx31.h"
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#include "mc13783.h"
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#include "clkctl-imx31.h"
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#include "kernel.h"
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#include "thread.h"
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extern void (*tick_funcs[MAX_NUM_TICK_TASKS])(void);
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static __attribute__((interrupt("IRQ"))) void EPIT1_HANDLER(void)
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{
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int i;
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EPITSR1 = EPITSR_OCIF; /* Clear the pending status */
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/* Run through the list of tick tasks */
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for(i = 0;i < MAX_NUM_TICK_TASKS;i++)
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{
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if(tick_funcs[i])
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tick_funcs[i]();
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}
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current_tick++;
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}
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void tick_start(unsigned int interval_in_ms)
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{
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imx31_clkctl_module_clock_gating(CG_EPIT1, CGM_ON_ALL); /* EPIT1 module
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clock ON - before writing
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regs! */
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EPITCR1 &= ~(EPITCR_OCIEN | EPITCR_EN); /* Disable the counter */
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CLKCTL_WIMR0 &= ~WIM_IPI_INT_EPIT1; /* Clear wakeup mask */
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/* mcu_main_clk = 528MHz = 27MHz * 2 * ((9 + 7/9) / 1)
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* CLKSRC = ipg_clk = 528MHz / 4 / 2 = 66MHz,
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* EPIT Output Disconnected,
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* Enabled in wait mode
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* Prescale 1/2640 for 25KHz
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* Reload from modulus register,
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* Compare interrupt enabled,
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* Count from load value */
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EPITCR1 = EPITCR_CLKSRC_IPG_CLK | EPITCR_WAITEN | EPITCR_IOVW |
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EPITCR_PRESCALER(2640-1) | EPITCR_RLD | EPITCR_OCIEN |
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EPITCR_ENMOD;
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EPITLR1 = interval_in_ms*25; /* Count down from interval */
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EPITCMPR1 = 0; /* Event when counter reaches 0 */
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EPITSR1 = EPITSR_OCIF; /* Clear any pending interrupt */
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avic_enable_int(EPIT1, IRQ, 7, EPIT1_HANDLER);
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EPITCR1 |= EPITCR_EN; /* Enable the counter */
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}
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void kernel_device_init(void)
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{
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spi_init();
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mc13783_init();
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}
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#ifdef BOOTLOADER
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void tick_stop(void)
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{
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avic_disable_int(EPIT1); /* Disable insterrupt */
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EPITCR1 &= ~(EPITCR_OCIEN | EPITCR_EN); /* Disable counter */
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EPITSR1 = EPITSR_OCIF; /* Clear pending */
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imx31_clkctl_module_clock_gating(CG_EPIT1, CGM_OFF); /* Turn off module clock */
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}
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#endif
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