4bd97c6535
Merge the x1000 and jz47xx exception handling code since they use the same exception vectors and handlers. The interrupt handler is now called from the common exception vector, but remains separate for each board since they have different IRQ layouts. The new exception handler can provide a stack traceback from the interrupted code, rather than the (uninteresting) caller traceback displayed by panicf. This allows you to see what led up to a null pointer deref or division by zero, which makes it _much_ easier to track down errors that occur in common leaf functions like strcmp. Change-Id: I59a0ebb5e40fcb36505c3bfdb47f8cac2f9936b1
175 lines
5 KiB
C
175 lines
5 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2022 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "backtrace.h"
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#include "lcd.h"
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#include "backlight-target.h"
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#include "font.h"
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#include "logf.h"
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#include "mips.h"
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#undef sp /* breaks backtrace lib */
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#include <stdio.h>
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#include <string.h>
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#include <stdarg.h>
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/* copies exception frame info and error pc to the backtrace context */
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static void setup_exception_bt(struct mips_exception_frame* frame,
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unsigned long epc, struct mips_bt_context* ctx)
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{
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ctx->pc = (void*)epc;
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ctx->sp = (void*)frame->gpr[29 - 3];
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ctx->depth = 0;
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ctx->valid = (1 << MIPSBT_RA);
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ctx->reg[MIPSBT_RA] = frame->gpr[31 - 3];
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}
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/* dump backtrace for an exception */
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static void exception_bt(void* frame, unsigned long epc, unsigned* line)
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{
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struct mips_bt_context ctx;
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setup_exception_bt(frame, epc, &ctx);
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rb_backtrace_ctx(&ctx, line);
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}
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/*
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* TODO: This should be converted into a generic panic routine that accepts
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* a backtrace context argument but the ARM backtrace setup will need to be
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* refactored in order to do that
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*/
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static void exception_dump(void* frame, unsigned long epc,
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const char* fmt, ...)
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{
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extern char panic_buf[128];
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va_list ap;
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set_irq_level(DISABLE_INTERRUPTS);
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va_start(ap, fmt);
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vsnprintf(panic_buf, sizeof(panic_buf), fmt, ap);
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va_end(ap);
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lcd_set_viewport(NULL);
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#if LCD_DEPTH > 1
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lcd_set_backdrop(NULL);
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lcd_set_drawmode(DRMODE_SOLID);
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lcd_set_foreground(LCD_BLACK);
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lcd_set_background(LCD_WHITE);
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#endif
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lcd_clear_display();
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lcd_setfont(FONT_SYSFIXED);
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unsigned y = 1;
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lcd_puts(1, y++, "*EXCEPTION*");
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/* wrap panic message */
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{
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const int linechars = (LCD_WIDTH / SYSFONT_WIDTH) - 2;
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int pos = 0, len = strlen(panic_buf);
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while(len > 0) {
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int idx = pos + MIN(len, linechars);
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char c = panic_buf[idx];
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panic_buf[idx] = 0;
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lcd_puts(1, y++, &panic_buf[pos]);
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panic_buf[idx] = c;
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len -= linechars;
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pos += linechars;
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}
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}
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exception_bt(frame, epc, &y);
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#ifdef ROCKBOX_HAS_LOGF
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logf_panic_dump(&y);
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#endif
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lcd_update();
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backlight_hw_on();
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#ifdef HAVE_ADJUSTABLE_CPU_FREQ
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if (cpu_boost_lock())
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{
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set_cpu_frequency(0);
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cpu_boost_unlock();
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}
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#endif
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#ifdef HAVE_ATA_POWER_OFF
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ide_power_enable(false);
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#endif
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system_exception_wait();
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system_reboot();
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while(1);
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}
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#define EXC(x,y) case (x): return (y);
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static char* parse_exception(unsigned long cause)
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{
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switch(cause & M_CauseExcCode)
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{
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EXC(EXC_INT, "Interrupt");
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EXC(EXC_MOD, "TLB Modified");
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EXC(EXC_TLBL, "TLB Exception (Load or Ifetch)");
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EXC(EXC_ADEL, "Address Error (Load or Ifetch)");
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EXC(EXC_ADES, "Address Error (Store)");
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EXC(EXC_TLBS, "TLB Exception (Store)");
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EXC(EXC_IBE, "Instruction Bus Error");
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EXC(EXC_DBE, "Data Bus Error");
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EXC(EXC_SYS, "Syscall");
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EXC(EXC_BP, "Breakpoint");
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EXC(EXC_RI, "Reserved Instruction");
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EXC(EXC_CPU, "Coprocessor Unusable");
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EXC(EXC_OV, "Overflow");
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EXC(EXC_TR, "Trap Instruction");
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EXC(EXC_FPE, "Floating Point Exception");
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EXC(EXC_C2E, "COP2 Exception");
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EXC(EXC_MDMX, "MDMX Exception");
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EXC(EXC_WATCH, "Watch Exception");
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EXC(EXC_MCHECK, "Machine Check Exception");
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EXC(EXC_CacheErr, "Cache error caused re-entry to Debug Mode");
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default:
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return 0;
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}
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}
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#undef EXC
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void exception_handler(void* frame, unsigned long epc)
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{
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unsigned long cause = read_c0_cause();
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exception_dump(frame, epc, "%s [0x%08x] at %08lx",
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parse_exception(cause), read_c0_badvaddr(), epc);
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}
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void cache_error_handler(void* frame, unsigned long epc)
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{
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exception_dump(frame, epc, "Cache Error [0x%08x] at %08lx",
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read_c0_cacheerr(), epc);
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}
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void tlb_refill_handler(void* frame, unsigned long epc)
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{
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exception_dump(frame, epc, "TLB refill at %08lx [0x%x]",
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epc, read_c0_badvaddr());
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}
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