rockbox/firmware/app.lds
Greg White 355be5010a Setup LCD ourselves; move LCD buffer and TTB to free up 1.7MB of memory
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11994 a1c6a512-1295-4272-9138-f99709370657
2007-01-13 02:24:15 +00:00

248 lines
4.9 KiB
Text

#include "config.h"
ENTRY(start)
#ifdef CPU_COLDFIRE
OUTPUT_FORMAT(elf32-m68k)
INPUT(target/coldfire/crt0.o)
#elif defined(CPU_ARM)
OUTPUT_FORMAT(elf32-littlearm)
OUTPUT_ARCH(arm)
#ifdef CPU_PP
INPUT(target/arm/crt0-pp.o)
#elif defined(CPU_ARM)
INPUT(target/arm/crt0.o)
#endif
#else
OUTPUT_FORMAT(elf32-sh)
INPUT(target/sh/crt0.o)
#endif
#define PLUGINSIZE PLUGIN_BUFFER_SIZE
#define CODECSIZE CODEC_SIZE
#ifdef DEBUG
#define STUBOFFSET 0x10000
#else
#define STUBOFFSET 0
#endif
#if CONFIG_CPU!=S3C2440
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
#endif
#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300)
#define DRAMORIG 0x31000000 + STUBOFFSET
#define IRAMORIG 0x10000000
#define IRAMSIZE 0xc000
#elif defined(IAUDIO_X5)
#define DRAMORIG 0x31000000 + STUBOFFSET
#define IRAMORIG 0x10000000
#define IRAMSIZE 0x10000
#elif defined(CPU_PP)
#define DRAMORIG 0x00000000 + STUBOFFSET
#define IRAMORIG 0x40000000
#define IRAMSIZE 0xc000
#elif CONFIG_CPU==PNX0101
#define DRAMORIG 0xc00000 + STUBOFFSET
#define IRAMORIG 0x400000
#define IRAMSIZE 0x7000
#elif CONFIG_CPU==S3C2440
#include "s3c2440.h"
#define DRAMORIG (0x100 + STUBOFFSET)
#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - STUBOFFSET - LCD_BUFFER_SIZE - TTB_SIZE - PLUGINSIZE - CODECSIZE
#define IRAMORIG DRAMORIG
#define IRAMSIZE 4K
#define IRAM DRAM
#else
#define DRAMORIG 0x09000000 + STUBOFFSET
#define IRAMORIG 0x0f000000
#define IRAMSIZE 0x1000
#endif
/* End of the audio buffer, where the codec buffer starts */
#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
/* Where the codec buffer ends, and the plugin buffer starts */
#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
MEMORY
{
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
#if CONFIG_CPU != S3C2440
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
#endif
#if CONFIG_CPU==PNX0101
IRAM0 : ORIGIN = 0x0, LENGTH = IRAMSIZE
#endif
}
SECTIONS
{
#ifndef CPU_ARM
.vectors :
{
loadaddress = .;
_loadaddress = .;
KEEP(*(.resetvectors));
*(.resetvectors);
KEEP(*(.vectors));
*(.vectors);
} > DRAM
.text :
{
#else
.text :
{
loadaddress = .;
_loadaddress = .;
#endif
. = ALIGN(0x200);
*(.init.text)
*(.text*)
#ifdef CPU_ARM
*(.glue_7)
*(.glue_7t)
#endif
. = ALIGN(0x4);
} > DRAM
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
. = ALIGN(0x4);
/* Pseudo-allocate the copies of the data sections */
_datacopy = .;
} > DRAM
/* TRICK ALERT! For RAM execution, we put the .data section at the
same load address as the copy. Thus, we don't waste extra RAM
when we don't actually need the copy. */
.data : AT ( _datacopy )
{
_datastart = .;
*(.data*)
. = ALIGN(0x4);
_dataend = .;
} > DRAM
/DISCARD/ :
{
*(.eh_frame)
}
#ifdef CPU_ARM
.vectors 0x0 :
{
_vectorsstart = .;
*(.vectors);
_vectorsend = .;
#if CONFIG_CPU==PNX0101
*(.dmabuf)
} >IRAM0 AT> DRAM
#else
} AT> DRAM
#endif
_vectorscopy = LOADADDR(.vectors);
#endif
#if CONFIG_CPU==PNX0101
.iram IRAMORIG + SIZEOF(.vectors) :
#elif CONFIG_CPU==S3C2440
.iram :
#else
.iram IRAMORIG :
#endif
{
_iramstart = .;
*(.icode)
*(.irodata)
*(.idata)
_iramend = .;
} > IRAM AT> DRAM
_iramcopy = LOADADDR(.iram);
.ibss (NOLOAD) :
{
_iedata = .;
*(.ibss)
. = ALIGN(0x4);
_iend = .;
} > IRAM
#if defined(CPU_COLDFIRE) || defined(CPU_ARM)
.stack :
{
*(.stack)
stackbegin = .;
. += 0x2000;
stackend = .;
} > IRAM
#ifdef CPU_PP
.cop_stack :
{
*(.cop_stack)
cop_stackbegin = .;
. += 0x0500;
cop_stackend = .;
} > IRAM
#endif
#else
/* TRICK ALERT! We want 0x2000 bytes of stack, but we set the section
size smaller, and allow the stack to grow into the .iram copy */
.stack ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
{
*(.stack)
_stackbegin = . - SIZEOF(.iram);
. += 0x2000 - SIZEOF(.iram);
_stackend = .;
} > DRAM
#endif
#if defined(CPU_COLDFIRE)
.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
#elif defined(CPU_ARM) && CONFIG_CPU != S3C2440
.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
#else
.bss :
#endif
{
_edata = .;
*(.bss*)
*(COMMON)
. = ALIGN(0x4);
_end = .;
} > DRAM
.audiobuf ALIGN(4) :
{
_audiobuffer = .;
audiobuffer = .;
} > DRAM
.audiobufend ENDAUDIOADDR:
{
audiobufend = .;
_audiobufend = .;
} > DRAM
.codec ENDAUDIOADDR:
{
codecbuf = .;
_codecbuf = .;
}
.plugin ENDADDR:
{
_pluginbuf = .;
pluginbuf = .;
}
}