a26519680a
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11828 a1c6a512-1295-4272-9138-f99709370657
708 lines
20 KiB
C
708 lines
20 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 Daniel Ankers
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "lcd.h"
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#include "ata.h"
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#include "ata-target.h"
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#include "ata_idle_notify.h"
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#include "cpu.h"
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#include "system.h"
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#include <stdio.h>
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#include <stdbool.h>
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#include <string.h>
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#include "kernel.h"
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#include "thread.h"
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#define NOINLINE_ATTR __attribute__((noinline)) /* don't inline the loops */
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#define BLOCK_SIZE (512)
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#define SECTOR_SIZE (512)
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#define BLOCKS_PER_BANK 0x7a7800
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#define STATUS_REG (*(volatile unsigned int *)(0x70008204))
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#define REG_1 (*(volatile unsigned int *)(0x70008208))
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#define UNKNOWN (*(volatile unsigned int *)(0x70008210))
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#define BLOCK_SIZE_REG (*(volatile unsigned int *)(0x7000821c))
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#define BLOCK_COUNT_REG (*(volatile unsigned int *)(0x70008220))
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#define REG_5 (*(volatile unsigned int *)(0x70008224))
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#define CMD_REG0 (*(volatile unsigned int *)(0x70008228))
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#define CMD_REG1 (*(volatile unsigned int *)(0x7000822c))
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#define CMD_REG2 (*(volatile unsigned int *)(0x70008230))
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#define RESPONSE_REG (*(volatile unsigned int *)(0x70008234))
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#define SD_STATE_REG (*(volatile unsigned int *)(0x70008238))
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#define REG_11 (*(volatile unsigned int *)(0x70008240))
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#define REG_12 (*(volatile unsigned int *)(0x70008244))
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#define DATA_REG (*(volatile unsigned int *)(0x70008280))
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#define DATA_DONE (1 << 12)
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#define CMD_DONE (1 << 13)
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#define ERROR_BITS (0x3f)
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#define FIFO_FULL (1 << 7)
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#define FIFO_EMPTY (1 << 6)
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/* SD States */
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#define IDLE 0
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#define READY 1
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#define IDENT 2
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#define STBY 3
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#define TRAN 4
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#define DATA 5
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#define RCV 6
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#define PRG 7
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#define DIS 8
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#define FIFO_SIZE 16 /* FIFO is 16 words deep */
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/* SD Commands */
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#define GO_IDLE_STATE 0
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#define ALL_SEND_CID 2
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#define SEND_RELATIVE_ADDR 3
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#define SET_DSR 4
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#define SWITCH_FUNC 6
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#define SELECT_CARD 7
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#define DESELECT_CARD 7
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#define SEND_CSD 9
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#define SEND_CID 10
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#define STOP_TRANSMISSION 12
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#define SEND_STATUS 13
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#define GO_INACTIVE_STATE 15
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#define SET_BLOCKLEN 16
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#define READ_SINGLE_BLOCK 17
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#define READ_MULTIPLE_BLOCK 18
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#define WRITE_BLOCK 24
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#define WRITE_MULTIPLE_BLOCK 25
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#define ERASE_WR_BLK_START 32
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#define ERASE_WR_BLK_END 33
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#define ERASE 38
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/* Application Specific commands */
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#define SET_BUS_WIDTH 6
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#define SD_APP_OP_COND 41
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#define READ_TIMEOUT 5*HZ
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#define WRITE_TIMEOUT 0.5*HZ
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static unsigned short identify_info[SECTOR_SIZE];
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int ata_spinup_time = 0;
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long last_disk_activity = -1;
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static bool initialized = false;
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static unsigned char current_bank = 0; /* The bank that we are working with */
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static tSDCardInfo card_info[2];
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/* For multi volume support */
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static int current_card = 0;
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static struct mutex sd_mtx;
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static long sd_stack [DEFAULT_STACK_SIZE/sizeof(long)];
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static const char sd_thread_name[] = "sd";
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static struct event_queue sd_queue;
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/* Private Functions */
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bool sd_send_command(unsigned int cmd, unsigned long arg1, unsigned int arg2)
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{
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bool result = false;
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do
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{
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CMD_REG0 = cmd;
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CMD_REG1 = (unsigned int)((arg1 & 0xffff0000) >> 16);
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CMD_REG2 = (unsigned int)((arg1 & 0xffff));
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UNKNOWN = arg2;
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while ((STATUS_REG & CMD_DONE) == 0)
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{
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/* Busy wait */
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}
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if ((STATUS_REG & ERROR_BITS) == 0)
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{
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result = true;
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}
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} while ((STATUS_REG & ERROR_BITS) != 0);
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return result;
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}
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void sd_read_response(unsigned int *response, int type)
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{
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int i;
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int words; /* Number of 16 bit words to read from RESPONSE_REG */
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unsigned int response_from_card[9];
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if(type == 2)
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{
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words = 9; /* R2 types are 8.5 16-bit words long */
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} else {
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words = 3;
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}
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for (i = 0; i < words; i++) /* RESPONSE_REG is read MSB first */
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{
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response_from_card[i] = RESPONSE_REG; /* Read most significant 16-bit word */
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}
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switch (type)
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{
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case 1:
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/* Response type 1 has the following structure:
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Start bit
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Transmission bit
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Command index (6 bits)
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Card Status (32 bits)
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CRC7 (7 bits)
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Stop bit
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*/
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/* TODO: Sanity checks */
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response[0] = ((response_from_card[0] & 0xff) << 24)
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+ (response_from_card[1] << 8)
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+ ((response_from_card[2] & 0xff00) >> 8);
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break;
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case 2:
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/* Response type 2 has the following structure:
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Start bit
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Transmission bit
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Reserved (6 bits)
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CSD/CID register (127 bits)
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Stop bit
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*/
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response[3] = ((response_from_card[0]&0xff)<<24) +
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(response_from_card[1]<<8) +
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((response_from_card[2]&0xff00)>>8);
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response[2] = ((response_from_card[2]&0xff)<<24) +
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(response_from_card[3]<<8) +
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((response_from_card[4]&0xff00)>>8);
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response[1] = ((response_from_card[4]&0xff)<<24) +
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(response_from_card[5]<<8) +
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((response_from_card[6]&0xff00)>>8);
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response[0] = ((response_from_card[6]&0xff)<<24) +
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(response_from_card[7]<<8) +
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((response_from_card[8]&0xff00)>>8);
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break;
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case 3:
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/* Response type 3 has the following structure:
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Start bit
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Transmission bit
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Reserved (6 bits)
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OCR register (32 bits)
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Reserved (7 bits)
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Stop bit
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*/
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response[0] = ((response_from_card[0] & 0xff) << 24)
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+ (response_from_card[1] << 8)
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+ ((response_from_card[2] & 0xff00) >> 8);
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/* Types 4-6 not supported yet */
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}
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}
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bool sd_send_acommand(unsigned int cmd, unsigned long arg1, unsigned int arg2)
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{
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unsigned int returncode;
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if (sd_send_command(55, (card_info[current_card].rca)<<16, 1) == false)
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return false;
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sd_read_response(&returncode, 1);
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if (sd_send_command(cmd, arg1, arg2) == false)
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return false;
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return true;
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}
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void sd_wait_for_state(tSDCardInfo* card, unsigned int state)
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{
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unsigned int response = 0;
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while(((response >> 9) & 0xf) != state)
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{
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sd_send_command(SEND_STATUS, (card->rca) << 16, 1);
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sd_read_response(&response, 1);
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/* TODO: Add a timeout and error handling */
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}
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SD_STATE_REG = state;
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}
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static void copy_read_sectors(unsigned char* buf, int wordcount)
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NOINLINE_ATTR ICODE_ATTR;
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static void copy_read_sectors(unsigned char* buf, int wordcount)
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{
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unsigned int tmp = 0;
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if ( (unsigned long)buf & 1)
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{ /* not 16-bit aligned, copy byte by byte */
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unsigned char* bufend = buf + wordcount*2;
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do
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{
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tmp = DATA_REG;
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*buf++ = tmp & 0xff;
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*buf++ = tmp >> 8;
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} while (buf < bufend); /* tail loop is faster */
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}
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else
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{ /* 16-bit aligned, can do faster copy */
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unsigned short* wbuf = (unsigned short*)buf;
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unsigned short* wbufend = wbuf + wordcount;
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do
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{
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*wbuf = DATA_REG;
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} while (++wbuf < wbufend); /* tail loop is faster */
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}
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}
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static void copy_write_sectors(const unsigned char* buf, int wordcount)
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NOINLINE_ATTR ICODE_ATTR;
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static void copy_write_sectors(const unsigned char* buf, int wordcount)
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{
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if ( (unsigned long)buf & 1)
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{ /* not 16-bit aligned, copy byte by byte */
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unsigned short tmp = 0;
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const unsigned char* bufend = buf + wordcount*2;
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do
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{
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tmp = (unsigned short) *buf++;
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tmp |= (unsigned short) *buf++ << 8;
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DATA_REG = tmp;
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} while (buf < bufend); /* tail loop is faster */
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}
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else
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{ /* 16-bit aligned, can do faster copy */
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unsigned short* wbuf = (unsigned short*)buf;
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unsigned short* wbufend = wbuf + wordcount;
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do
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{
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lcd_update();
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DATA_REG = *wbuf;
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} while (++wbuf < wbufend); /* tail loop is faster */
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}
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}
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void sd_select_bank(unsigned char bank)
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{
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unsigned int response;
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unsigned char card_data[512];
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unsigned char* write_buf;
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int i;
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tSDCardInfo *card = &card_info[0]; /* Bank selection will only be done on
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the onboard flash */
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if (current_bank != bank)
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{
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memset(card_data, 0, 512);
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sd_wait_for_state(card, TRAN);
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BLOCK_SIZE_REG = 512;
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BLOCK_COUNT_REG = 1;
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sd_send_command(35, 0, 0x1c0d); /* CMD35 is vendor specific */
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sd_read_response(&response, 1);
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SD_STATE_REG = PRG;
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card_data[0] = bank;
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/* Write the card data */
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write_buf = card_data;
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for (i = 0; i < BLOCK_SIZE / 2; i += FIFO_SIZE)
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{
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/* Wait for the FIFO to be empty */
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while((STATUS_REG & FIFO_EMPTY) == 0) {} /* Erm... is this right? */
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copy_write_sectors(write_buf, FIFO_SIZE);
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write_buf += FIFO_SIZE*2; /* Advance one chunk of 16 words */
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}
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while((STATUS_REG & DATA_DONE) == 0) {}
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current_bank = bank;
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}
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}
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void sd_init_device(void)
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{
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/* SD Protocol registers */
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unsigned int dummy;
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int i;
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static unsigned int read_bl_len = 0;
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static unsigned int c_size = 0;
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static unsigned int c_size_mult = 0;
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static unsigned long mult = 0;
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unsigned char carddata[512];
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unsigned char *dataptr;
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tSDCardInfo *card = &card_info[0]; /* Init onboard flash only */
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/* Initialise card data as blank */
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card->initialized = false;
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card->ocr = 0;
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card->csd[0] = 0;
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card->csd[1] = 0;
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card->csd[2] = 0;
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card->cid[0] = 0;
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card->cid[1] = 0;
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card->cid[2] = 0;
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card->rca = 0;
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card->capacity = 0;
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card->numblocks = 0;
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card->block_size = 0;
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card->block_exp = 0;
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/* Enable and initialise controller */
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GPIOG_ENABLE |= (0x3 << 5);
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GPIOG_OUTPUT_EN |= (0x3 << 5);
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GPIOG_OUTPUT_VAL |= (0x3 << 5);
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outl(inl(0x70000088) & ~(0x4), 0x70000088);
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outl(inl(0x7000008c) & ~(0x4), 0x7000008c);
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outl(inl(0x70000080) | 0x4, 0x70000080);
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outl(inl(0x70000084) | 0x4, 0x70000084);
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REG_1 = 6;
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outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
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outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
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outl(0x1010, 0x70000034);
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GPIOA_ENABLE |= (1 << 7);
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GPIOA_OUTPUT_EN &= ~(1 << 7);
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GPIOD_ENABLE |= (0x1f);
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GPIOD_OUTPUT_EN |= (0x1f);
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GPIOD_OUTPUT_VAL |= (0x1f);
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outl(inl(0x6000600c) | (1 << 14), 0x6000600c);
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outl(inl(0x60006004) | (1 << 14), 0x60006004);
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outl(inl(0x60006004) & ~(1 << 14), 0x60006004); /* Reset Controller? */
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outl(0, 0x6000b000);
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outl(0, 0x6000a000); /* Init DMA controller? */
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/* Init NAND */
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REG_11 |= (1 << 15);
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REG_12 |= (1 << 15);
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REG_12 &= ~(3 << 12);
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REG_12 |= (1 << 13);
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REG_11 &= ~(3 << 12);
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REG_11 |= (1 << 13);
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SD_STATE_REG = TRAN;
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REG_5 = 0xf;
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sd_send_command(GO_IDLE_STATE, 0, 256);
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while ((card->ocr & (1 << 31)) == 0) /* Loop until the card is powered up */
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{
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sd_send_acommand(SD_APP_OP_COND, 0x100000, 3);
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sd_read_response(&(card->ocr), 3);
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if (card->ocr == 0)
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{
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/* TODO: Handle failure */
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while (1) {};
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}
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}
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sd_send_command(ALL_SEND_CID, 0, 2);
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sd_read_response(card->cid, 2);
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sd_send_command(SEND_RELATIVE_ADDR, 0, 1);
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sd_read_response(&card->rca, 1);
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card->rca >>= 16; /* The Relative Card Address is the top 16 bits of the
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32 bits returned. Whenever it is used, it gets
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shifted left by 16 bits, so this step could possibly
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be skipped. */
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sd_send_command(SEND_CSD, card->rca << 16, 2);
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sd_read_response(card->csd, 2);
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/* Parse disk geometry */
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/* These calculations come from the Sandisk SD card product manual */
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read_bl_len = ((card->csd[2] >> 16) & 0xf);
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c_size = ((card->csd[2] & (0x3ff)) << 2) +
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((card->csd[1] & (0xc0000000)) >> 30);
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c_size_mult = ((card->csd[1] >> 15) & 0x7);
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mult = (1<<(c_size_mult + 2));
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card->max_read_bl_len = (1<<read_bl_len);
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card->block_size = BLOCK_SIZE; /* Always use 512 byte blocks */
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card->numblocks = (c_size + 1) * mult * (card->max_read_bl_len / 512);
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card->capacity = card->numblocks * card->block_size;
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REG_1 = 0;
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sd_send_command(SELECT_CARD, card->rca << 16, 129);
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sd_read_response(&dummy, 1); /* I don't think we use the result from this */
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sd_send_acommand(SET_BUS_WIDTH, (card->rca << 16) | 2, 1);
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sd_read_response(&dummy, 1); /* 4 bit wide bus */
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sd_send_command(SET_BLOCKLEN, card->block_size, 1);
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sd_read_response(&dummy, 1);
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BLOCK_SIZE_REG = card->block_size;
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/* If this card is > 4Gb, then we need to enable bank switching */
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if(card->numblocks >= BLOCKS_PER_BANK)
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{
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SD_STATE_REG = TRAN;
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BLOCK_COUNT_REG = 1;
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sd_send_command(SWITCH_FUNC, 0x80ffffef, 0x1c05);
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sd_read_response(&dummy, 1);
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/* Read 512 bytes from the card.
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The first 512 bits contain the status information
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TODO: Do something useful with this! */
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dataptr = carddata;
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for (i = 0; i < BLOCK_SIZE / 2; i += FIFO_SIZE)
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{
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/* Wait for the FIFO to be full */
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while((STATUS_REG & FIFO_FULL) == 0) {}
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copy_read_sectors(dataptr, FIFO_SIZE);
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dataptr += (FIFO_SIZE*2); /* Advance one chunk of 16 words */
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}
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}
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mutex_init(&sd_mtx);
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}
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/* API Functions */
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void ata_led(bool onoff)
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{
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(void)onoff;
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}
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int ata_read_sectors(IF_MV2(int drive,)
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unsigned long start,
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int incount,
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void* inbuf)
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{
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int ret = 0;
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long timeout;
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int count;
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void* buf;
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long spinup_start;
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unsigned int dummy;
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unsigned int response;
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unsigned int i;
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tSDCardInfo *card = &card_info[current_card];
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/* TODO: Add DMA support. */
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#ifdef HAVE_MULTIVOLUME
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(void)drive; /* unused for now */
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#endif
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mutex_lock(&sd_mtx);
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last_disk_activity = current_tick;
|
|
spinup_start = current_tick;
|
|
|
|
ata_led(true);
|
|
|
|
timeout = current_tick + READ_TIMEOUT;
|
|
|
|
/* TODO: Select device */
|
|
if(current_card == 0)
|
|
{
|
|
if(start >= BLOCKS_PER_BANK)
|
|
{
|
|
sd_select_bank(1);
|
|
start -= BLOCKS_PER_BANK;
|
|
} else {
|
|
sd_select_bank(0);
|
|
}
|
|
}
|
|
|
|
buf = inbuf;
|
|
count = incount;
|
|
while (TIME_BEFORE(current_tick, timeout)) {
|
|
ret = 0;
|
|
last_disk_activity = current_tick;
|
|
|
|
SD_STATE_REG = TRAN;
|
|
BLOCK_COUNT_REG = count;
|
|
sd_send_command(READ_MULTIPLE_BLOCK, start * BLOCK_SIZE, 0x1c25);
|
|
sd_read_response(&dummy, 1);
|
|
/* TODO: Don't assume BLOCK_SIZE == SECTOR_SIZE */
|
|
|
|
for (i = 0; i < count * card->block_size / 2; i += FIFO_SIZE)
|
|
{
|
|
/* Wait for the FIFO to be full */
|
|
while((STATUS_REG & FIFO_FULL) == 0) {}
|
|
|
|
copy_read_sectors(buf, FIFO_SIZE);
|
|
|
|
buf += FIFO_SIZE*2; /* Advance one chunk of 16 words */
|
|
|
|
/* TODO: Switch bank if necessary */
|
|
|
|
last_disk_activity = current_tick;
|
|
}
|
|
udelay(75);
|
|
sd_send_command(STOP_TRANSMISSION, 0, 1);
|
|
sd_read_response(&dummy, 1);
|
|
|
|
response = 0;
|
|
sd_wait_for_state(card, TRAN);
|
|
break;
|
|
}
|
|
ata_led(false);
|
|
|
|
mutex_unlock(&sd_mtx);
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
int ata_write_sectors(IF_MV2(int drive,)
|
|
unsigned long start,
|
|
int count,
|
|
const void* buf)
|
|
{
|
|
/* Write support is not finished yet */
|
|
/* TODO: The standard suggests using ACMD23 prior to writing multiple blocks
|
|
to improve performance */
|
|
unsigned int response;
|
|
void const* write_buf;
|
|
int ret = 0;
|
|
unsigned int i;
|
|
long timeout;
|
|
tSDCardInfo *card = &card_info[current_card];
|
|
|
|
mutex_lock(&sd_mtx);
|
|
ata_led(true);
|
|
if(current_card == 0)
|
|
{
|
|
if(start < BLOCKS_PER_BANK)
|
|
{
|
|
sd_select_bank(0);
|
|
} else {
|
|
sd_select_bank(1);
|
|
start -= BLOCKS_PER_BANK;
|
|
}
|
|
}
|
|
|
|
retry:
|
|
sd_wait_for_state(card, TRAN);
|
|
BLOCK_COUNT_REG = count;
|
|
sd_send_command(WRITE_MULTIPLE_BLOCK, start * SECTOR_SIZE, 0x1c2d);
|
|
sd_read_response(&response, 1);
|
|
write_buf = buf;
|
|
for (i = 0; i < count * card->block_size / 2; i += FIFO_SIZE)
|
|
{
|
|
if(i >= (count * card->block_size / 2)-FIFO_SIZE)
|
|
{
|
|
/* Set SD_STATE_REG to PRG for the last buffer fill */
|
|
SD_STATE_REG = PRG;
|
|
}
|
|
|
|
/* Wait for the FIFO to be empty */
|
|
while((STATUS_REG & FIFO_EMPTY) == 0) {}
|
|
/* Perhaps we could use bit 8 of card status (READY_FOR_DATA)? */
|
|
|
|
copy_write_sectors(write_buf, FIFO_SIZE);
|
|
|
|
write_buf += FIFO_SIZE*2; /* Advance one chunk of 16 words */
|
|
/* TODO: Switch bank if necessary */
|
|
|
|
last_disk_activity = current_tick;
|
|
}
|
|
|
|
timeout = current_tick + WRITE_TIMEOUT;
|
|
|
|
while((STATUS_REG & DATA_DONE) == 0) {
|
|
if(current_tick >= timeout)
|
|
{
|
|
sd_send_command(STOP_TRANSMISSION, 0, 1);
|
|
sd_read_response(&response, 1);
|
|
goto retry;
|
|
}
|
|
}
|
|
sd_send_command(STOP_TRANSMISSION, 0, 1);
|
|
sd_read_response(&response, 1);
|
|
|
|
sd_wait_for_state(card, TRAN);
|
|
mutex_unlock(&sd_mtx);
|
|
ata_led(false);
|
|
return ret;
|
|
}
|
|
|
|
static void sd_thread(void)
|
|
{
|
|
struct event ev;
|
|
bool idle_notified = false;
|
|
|
|
while (1) {
|
|
queue_wait_w_tmo(&sd_queue, &ev, HZ);
|
|
switch ( ev.id )
|
|
{
|
|
default:
|
|
if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
|
|
{
|
|
idle_notified = false;
|
|
}
|
|
else
|
|
{
|
|
if (!idle_notified)
|
|
{
|
|
call_ata_idle_notifys(false);
|
|
idle_notified = true;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void ata_spindown(int seconds)
|
|
{
|
|
(void)seconds;
|
|
}
|
|
|
|
bool ata_disk_is_active(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void ata_sleep(void)
|
|
{
|
|
}
|
|
|
|
void ata_spin(void)
|
|
{
|
|
}
|
|
|
|
/* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
|
|
int ata_hard_reset(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int ata_soft_reset(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void ata_enable(bool on)
|
|
{
|
|
(void)on;
|
|
}
|
|
|
|
unsigned short* ata_get_identify(void)
|
|
{
|
|
return identify_info;
|
|
}
|
|
|
|
int ata_init(void)
|
|
{
|
|
sd_init_device();
|
|
if ( !initialized )
|
|
{
|
|
queue_init(&sd_queue, true);
|
|
create_thread(sd_thread, sd_stack,
|
|
sizeof(sd_stack), sd_thread_name IF_PRIO(, PRIORITY_SYSTEM));
|
|
initialized = true;
|
|
}
|
|
|
|
return 0;
|
|
}
|