dd4ea29f01
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5890 a1c6a512-1295-4272-9138-f99709370657
202 lines
3.6 KiB
Text
202 lines
3.6 KiB
Text
#include "config.h"
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ENTRY(start)
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#if CONFIG_CPU == MCF5249
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OUTPUT_FORMAT(elf32-m68k)
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#elif CONFIG_CPU == TCC730
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OUTPUT_FORMAT(elf32-calmrisc16)
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#else
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OUTPUT_FORMAT(elf32-sh)
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#endif
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INPUT(crt0.o)
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#if CONFIG_CPU == TCC730
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MEMORY
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{
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FIRMWARE : ORIGIN = LOADADDRESS, LENGTH = 256K
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FLASH (RX) : ORIGIN = 0x000000, LENGTH = 1024K
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ICMEM (RX) : ORIGIN = 0x3FC000, LENGTH = 32K
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IMEM1 : ORIGIN = 0x200000, LENGTH = 32K
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IMEM2 : ORIGIN = 0x210000, LENGTH = 32K
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IMEM3 : ORIGIN = 0x220000, LENGTH = 16K
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IMEM4 : ORIGIN = 0x230000, LENGTH = 16K
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DRAM : ORIGIN = 0x000000, LENGTH = 0x3F0000
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}
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SECTIONS
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{
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.text LOADADDRESS : {
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*(.init.text)
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*(.text)
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*(.icode) /* We don't put it in ICMEM coz crt1 uses LCD (now)*/
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}> FLASH AT> FIRMWARE
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.icode 0x3FC040: {
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*(.vectors)
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}> ICMEM AT> FIRMWARE
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.data 0x2000: {
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*(.data)
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. = ALIGN(2);
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*(.rodata)
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. = ALIGN(2);
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*(.rodata.str1.2)
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. = ALIGN(2);
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}> DRAM AT> FIRMWARE
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.bss ALIGN(2) : {
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*(.bss)
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. = ALIGN(2);
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}> DRAM
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.stack ALIGN(2) : {
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. = . + 0x2000;
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}> DRAM
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.idata 0x200000: {
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*(.idata)
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}> DRAM
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_codesize = SIZEOF(.text);
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_icodecopy = LOADADDR(.icode);
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_icodestart = ADDR(.icode);
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_icodesize = SIZEOF(.icode);
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_datacopy = LOADADDR(.data);
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_datastart = ADDR(.data);
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_datasize = SIZEOF(.data);
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_bssstart = ADDR(.bss);
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_bsssize = (SIZEOF(.bss) + 1) & ~ 1;
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_stackbegin = ADDR(.stack);
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_stackend = ADDR(.stack) + SIZEOF(.stack);
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_idatastart = ADDR(.idata);
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}
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#else
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#define PLUGINSIZE 0x8000
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#ifdef DEBUG
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#define STUBOFFSET 0x10000
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#else
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#define STUBOFFSET 0
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#endif
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET
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#ifdef IRIVER_H100
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#define DRAMORIG 0x30000000 + STUBOFFSET
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#define IRAMORIG 0x10000000
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#define IRAMSIZE 0x18000
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#else
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#define DRAMORIG 0x09000000 + STUBOFFSET
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#define IRAMORIG 0x0f000000
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#define IRAMSIZE 0x1000
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#endif
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#define ENDADDR (DRAMORIG + DRAMSIZE)
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MEMORY
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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}
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SECTIONS
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{
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.vectors :
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{
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*(.resetvectors);
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*(.vectors);
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} > DRAM
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.text :
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{
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. = ALIGN(0x200);
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*(.init.text)
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*(.text)
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. = ALIGN(0x4);
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} > DRAM
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.rodata :
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{
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*(.rodata)
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*(.rodata.str1.1)
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*(.rodata.str1.4)
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. = ALIGN(0x4);
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/* Pseudo-allocate the copies of the data sections */
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_datacopy = .;
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} > DRAM
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/* TRICK ALERT! For RAM execution, we put the .data section at the
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same load address as the copy. Thus, we don't waste extra RAM
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when we don't actually need the copy. */
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.data : AT ( _datacopy )
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{
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_datastart = .;
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*(.data)
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. = ALIGN(0x4);
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_dataend = .;
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_iramcopy = .;
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} > DRAM
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.iram IRAMORIG : AT ( _iramcopy)
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{
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_iramstart = .;
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*(.icode)
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*(.idata)
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_iramend = .;
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} > IRAM
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/* TRICK ALERT! We want 0x2000 bytes of stack, but we set the section
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size smaller, and allow the stack to grow into the .iram copy */
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.stack ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
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{
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*(.stack)
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_stackbegin = . - SIZEOF(.iram);
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stackbegin = . - SIZEOF(.iram);
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. += 0x2000 - SIZEOF(.iram);
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_stackend = .;
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stackend = .;
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} > DRAM
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.bss :
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{
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_edata = .;
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*(.bss)
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*(COMMON)
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_end = .;
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} > DRAM
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.mp3buf :
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{
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_mp3buffer = .;
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mp3buffer = .;
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} > DRAM
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.mp3end ENDADDR:
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{
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mp3end = .;
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_mp3end = .;
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} > DRAM
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.plugin ENDADDR:
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{
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_pluginbuf = .;
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pluginbuf = .;
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}
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}
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#endif
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