0971f57634
Change-Id: Ib8dd0d011b11ee3eded3025308f19ddb5d151b59
158 lines
4.3 KiB
C
158 lines
4.3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Driver for internal Rockchip rk27xx audio codec
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* (shCODlp-100.01-HD IP core from Dolphin)
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*
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* Copyright (c) 2011 Marcin Bukat
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "kernel.h"
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#include "audio.h"
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#include "audiohw.h"
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#include "system.h"
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#include "i2c-rk27xx.h"
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/* private functions to read/write codec registers */
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static int codec_write(uint8_t reg, uint8_t val)
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{
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return i2c_write(CODEC_I2C_ADDR, reg, 1, &val);
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}
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#if 0
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static int codec_read(uint8_t reg, uint8_t *val)
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{
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return i2c_read(CODEC_I2C_ADDR, reg, 1, val);
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}
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#endif
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static uint8_t cr1_sel = DACSEL;
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static void audiohw_mute(bool mute)
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{
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if (mute)
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codec_write(CR1, SB_MICBIAS|DAC_MUTE|cr1_sel);
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else
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codec_write(CR1, SB_MICBIAS|cr1_sel);
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}
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/* public functions */
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static int vol_tenthdb2hw(int tdb)
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{
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/* we lie here a bit and present 0.5dB gain steps
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* but codec has 'variable' gain steps (0.5, 1.0, 2.0)
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* depending on gain region.
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*/
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if (tdb < VOLUME_MIN)
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return 32;
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else if (tdb < -115)
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return -(((tdb + 115)/20) - 20); /* 2.0 dB steps */
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else if (tdb < 5)
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return -(((tdb + 5)/10) - 9); /* 1.0 dB steps */
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else
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return -((tdb - 45)/5); /* 0.5 dB steps */
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}
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void audiohw_preinit(void)
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{
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/* PD7 output low */
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GPIO_PDDR &= ~(1<<7);
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GPIO_PDCON |= (1<<7);
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codec_write(PMR2, SB_SLEEP|GIM|SB_MC);
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codec_write(AICR, DAC_SERIAL|ADC_SERIAL|DAC_I2S|ADC_I2S);
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codec_write(CR1, SB_MICBIAS|DAC_MUTE|DACSEL);
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codec_write(CR2, ADC_HPF);
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codec_write(CCR1, CRYSTAL_12M);
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codec_write(CCR2, (FREQ44100 << 4)|FREQ44100);
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codec_write(CRR, RATIO_8|KFAST_32|THRESHOLD_128);
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codec_write(TR1, NOSC);
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}
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void audiohw_postinit(void)
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{
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/* power up DAC */
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codec_write(PMR1, SB_OUT|SB_MIX|SB_ADC|SB_IN1|SB_IN2|SB_MIC|SB_IND);
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/* leave sleep mode */
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codec_write(PMR2, GIM|SB_MC);
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/* 1ms delay */
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udelay(1000);
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/* power up output stage */
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codec_write(PMR1, SB_ADC|SB_MIC|SB_IND);
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sleep(HZ/10);
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GPIO_PDDR |= (1<<7); /* PD7 high */
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sleep(HZ/10);
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audiohw_mute(false);
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}
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void audiohw_close(void)
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{
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/* stub */
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}
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void audiohw_set_frequency(int fsel)
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{
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static const unsigned char values_freq[HW_NUM_FREQ] =
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{
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HW_HAVE_8_([HW_FREQ_8] = (FREQ8000<<4)|FREQ8000,)
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HW_HAVE_11_([HW_FREQ_11] = (FREQ11025<<4)|FREQ11025,)
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HW_HAVE_12_([HW_FREQ_12] = (FREQ12000<<4)|FREQ12000,)
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HW_HAVE_16_([HW_FREQ_16] = (FREQ16000<<4)|FREQ16000,)
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HW_HAVE_22_([HW_FREQ_22] = (FREQ22050<<4)|FREQ22050,)
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HW_HAVE_24_([HW_FREQ_24] = (FREQ24000<<4)|FREQ24000,)
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HW_HAVE_32_([HW_FREQ_32] = (FREQ32000<<4)|FREQ32000,)
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HW_HAVE_44_([HW_FREQ_44] = (FREQ44100<<4)|FREQ44100,)
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HW_HAVE_48_([HW_FREQ_48] = (FREQ48000<<4)|FREQ48000,)
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HW_HAVE_96_([HW_FREQ_96] = (FREQ96000<<4)|FREQ96000,)
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};
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if ((unsigned)fsel >= HW_NUM_FREQ)
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fsel = HW_FREQ_DEFAULT;
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/* we setup the same sampling freq for DAC and ADC */
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codec_write(CCR2, values_freq[fsel]);
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}
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void audiohw_set_volume(int vol_l, int vol_r)
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{
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vol_l = vol_tenthdb2hw(vol_l);
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vol_r = vol_tenthdb2hw(vol_r);
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if (vol_l > 31 || vol_r > 31)
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{
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audiohw_mute(true);
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}
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else
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{
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audiohw_mute(false);
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codec_write(CGR9, vol_r);
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codec_write(CGR8, vol_l);
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}
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}
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void audiohw_set_monitor(bool enable)
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{
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cr1_sel = enable ? BYPASS1|BYPASS2 : DACSEL;
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codec_write(CR1, cr1_sel|SB_MICBIAS);
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}
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