eac1ca22bd
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
475 lines
30 KiB
C
475 lines
30 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* This file was automatically generated by headergen, DO NOT EDIT it.
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* headergen version: 3.0.0
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* stmp3600 version: 2.4.0
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* stmp3600 authors: Amaury Pouly
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*
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* Copyright (C) 2015 by the authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HEADERGEN_STMP3600_ICOLL_H__
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#define __HEADERGEN_STMP3600_ICOLL_H__
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#define HW_ICOLL_VECTOR HW(ICOLL_VECTOR)
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#define HWA_ICOLL_VECTOR (0x80000000 + 0x0)
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#define HWT_ICOLL_VECTOR HWIO_32_RW
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#define HWN_ICOLL_VECTOR ICOLL_VECTOR
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#define HWI_ICOLL_VECTOR
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#define HW_ICOLL_VECTOR_SET HW(ICOLL_VECTOR_SET)
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#define HWA_ICOLL_VECTOR_SET (HWA_ICOLL_VECTOR + 0x4)
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#define HWT_ICOLL_VECTOR_SET HWIO_32_WO
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#define HWN_ICOLL_VECTOR_SET ICOLL_VECTOR
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#define HWI_ICOLL_VECTOR_SET
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#define HW_ICOLL_VECTOR_CLR HW(ICOLL_VECTOR_CLR)
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#define HWA_ICOLL_VECTOR_CLR (HWA_ICOLL_VECTOR + 0x8)
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#define HWT_ICOLL_VECTOR_CLR HWIO_32_WO
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#define HWN_ICOLL_VECTOR_CLR ICOLL_VECTOR
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#define HWI_ICOLL_VECTOR_CLR
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#define HW_ICOLL_VECTOR_TOG HW(ICOLL_VECTOR_TOG)
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#define HWA_ICOLL_VECTOR_TOG (HWA_ICOLL_VECTOR + 0xc)
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#define HWT_ICOLL_VECTOR_TOG HWIO_32_WO
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#define HWN_ICOLL_VECTOR_TOG ICOLL_VECTOR
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#define HWI_ICOLL_VECTOR_TOG
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#define BP_ICOLL_VECTOR_IRQVECTOR 2
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#define BM_ICOLL_VECTOR_IRQVECTOR 0xfffffffc
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#define BF_ICOLL_VECTOR_IRQVECTOR(v) (((v) & 0x3fffffff) << 2)
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#define BFM_ICOLL_VECTOR_IRQVECTOR(v) BM_ICOLL_VECTOR_IRQVECTOR
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#define BF_ICOLL_VECTOR_IRQVECTOR_V(e) BF_ICOLL_VECTOR_IRQVECTOR(BV_ICOLL_VECTOR_IRQVECTOR__##e)
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#define BFM_ICOLL_VECTOR_IRQVECTOR_V(v) BM_ICOLL_VECTOR_IRQVECTOR
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#define HW_ICOLL_LEVELACK HW(ICOLL_LEVELACK)
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#define HWA_ICOLL_LEVELACK (0x80000000 + 0x10)
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#define HWT_ICOLL_LEVELACK HWIO_32_RW
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#define HWN_ICOLL_LEVELACK ICOLL_LEVELACK
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#define HWI_ICOLL_LEVELACK
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#define BP_ICOLL_LEVELACK_IRQLEVELACK 0
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#define BM_ICOLL_LEVELACK_IRQLEVELACK 0xf
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#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1
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#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL1 0x2
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#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL2 0x4
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#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL3 0x8
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#define BF_ICOLL_LEVELACK_IRQLEVELACK(v) (((v) & 0xf) << 0)
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#define BFM_ICOLL_LEVELACK_IRQLEVELACK(v) BM_ICOLL_LEVELACK_IRQLEVELACK
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#define BF_ICOLL_LEVELACK_IRQLEVELACK_V(e) BF_ICOLL_LEVELACK_IRQLEVELACK(BV_ICOLL_LEVELACK_IRQLEVELACK__##e)
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#define BFM_ICOLL_LEVELACK_IRQLEVELACK_V(v) BM_ICOLL_LEVELACK_IRQLEVELACK
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#define HW_ICOLL_CTRL HW(ICOLL_CTRL)
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#define HWA_ICOLL_CTRL (0x80000000 + 0x20)
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#define HWT_ICOLL_CTRL HWIO_32_RW
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#define HWN_ICOLL_CTRL ICOLL_CTRL
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#define HWI_ICOLL_CTRL
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#define HW_ICOLL_CTRL_SET HW(ICOLL_CTRL_SET)
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#define HWA_ICOLL_CTRL_SET (HWA_ICOLL_CTRL + 0x4)
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#define HWT_ICOLL_CTRL_SET HWIO_32_WO
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#define HWN_ICOLL_CTRL_SET ICOLL_CTRL
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#define HWI_ICOLL_CTRL_SET
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#define HW_ICOLL_CTRL_CLR HW(ICOLL_CTRL_CLR)
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#define HWA_ICOLL_CTRL_CLR (HWA_ICOLL_CTRL + 0x8)
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#define HWT_ICOLL_CTRL_CLR HWIO_32_WO
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#define HWN_ICOLL_CTRL_CLR ICOLL_CTRL
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#define HWI_ICOLL_CTRL_CLR
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#define HW_ICOLL_CTRL_TOG HW(ICOLL_CTRL_TOG)
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#define HWA_ICOLL_CTRL_TOG (HWA_ICOLL_CTRL + 0xc)
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#define HWT_ICOLL_CTRL_TOG HWIO_32_WO
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#define HWN_ICOLL_CTRL_TOG ICOLL_CTRL
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#define HWI_ICOLL_CTRL_TOG
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#define BP_ICOLL_CTRL_SFTRST 31
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#define BM_ICOLL_CTRL_SFTRST 0x80000000
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#define BV_ICOLL_CTRL_SFTRST__RUN 0x0
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#define BV_ICOLL_CTRL_SFTRST__IN_RESET 0x1
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#define BF_ICOLL_CTRL_SFTRST(v) (((v) & 0x1) << 31)
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#define BFM_ICOLL_CTRL_SFTRST(v) BM_ICOLL_CTRL_SFTRST
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#define BF_ICOLL_CTRL_SFTRST_V(e) BF_ICOLL_CTRL_SFTRST(BV_ICOLL_CTRL_SFTRST__##e)
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#define BFM_ICOLL_CTRL_SFTRST_V(v) BM_ICOLL_CTRL_SFTRST
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#define BP_ICOLL_CTRL_CLKGATE 30
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#define BM_ICOLL_CTRL_CLKGATE 0x40000000
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#define BV_ICOLL_CTRL_CLKGATE__RUN 0x0
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#define BV_ICOLL_CTRL_CLKGATE__NO_CLOCKS 0x1
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#define BF_ICOLL_CTRL_CLKGATE(v) (((v) & 0x1) << 30)
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#define BFM_ICOLL_CTRL_CLKGATE(v) BM_ICOLL_CTRL_CLKGATE
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#define BF_ICOLL_CTRL_CLKGATE_V(e) BF_ICOLL_CTRL_CLKGATE(BV_ICOLL_CTRL_CLKGATE__##e)
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#define BFM_ICOLL_CTRL_CLKGATE_V(v) BM_ICOLL_CTRL_CLKGATE
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#define BP_ICOLL_CTRL_ENABLE2FIQ35 27
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#define BM_ICOLL_CTRL_ENABLE2FIQ35 0x8000000
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#define BV_ICOLL_CTRL_ENABLE2FIQ35__DISABLE 0x0
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#define BV_ICOLL_CTRL_ENABLE2FIQ35__ENABLE 0x1
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#define BF_ICOLL_CTRL_ENABLE2FIQ35(v) (((v) & 0x1) << 27)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ35(v) BM_ICOLL_CTRL_ENABLE2FIQ35
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#define BF_ICOLL_CTRL_ENABLE2FIQ35_V(e) BF_ICOLL_CTRL_ENABLE2FIQ35(BV_ICOLL_CTRL_ENABLE2FIQ35__##e)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ35_V(v) BM_ICOLL_CTRL_ENABLE2FIQ35
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#define BP_ICOLL_CTRL_ENABLE2FIQ34 26
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#define BM_ICOLL_CTRL_ENABLE2FIQ34 0x4000000
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#define BV_ICOLL_CTRL_ENABLE2FIQ34__DISABLE 0x0
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#define BV_ICOLL_CTRL_ENABLE2FIQ34__ENABLE 0x1
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#define BF_ICOLL_CTRL_ENABLE2FIQ34(v) (((v) & 0x1) << 26)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ34(v) BM_ICOLL_CTRL_ENABLE2FIQ34
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#define BF_ICOLL_CTRL_ENABLE2FIQ34_V(e) BF_ICOLL_CTRL_ENABLE2FIQ34(BV_ICOLL_CTRL_ENABLE2FIQ34__##e)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ34_V(v) BM_ICOLL_CTRL_ENABLE2FIQ34
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#define BP_ICOLL_CTRL_ENABLE2FIQ33 25
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#define BM_ICOLL_CTRL_ENABLE2FIQ33 0x2000000
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#define BV_ICOLL_CTRL_ENABLE2FIQ33__DISABLE 0x0
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#define BV_ICOLL_CTRL_ENABLE2FIQ33__ENABLE 0x1
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#define BF_ICOLL_CTRL_ENABLE2FIQ33(v) (((v) & 0x1) << 25)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ33(v) BM_ICOLL_CTRL_ENABLE2FIQ33
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#define BF_ICOLL_CTRL_ENABLE2FIQ33_V(e) BF_ICOLL_CTRL_ENABLE2FIQ33(BV_ICOLL_CTRL_ENABLE2FIQ33__##e)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ33_V(v) BM_ICOLL_CTRL_ENABLE2FIQ33
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#define BP_ICOLL_CTRL_ENABLE2FIQ32 24
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#define BM_ICOLL_CTRL_ENABLE2FIQ32 0x1000000
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#define BV_ICOLL_CTRL_ENABLE2FIQ32__DISABLE 0x0
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#define BV_ICOLL_CTRL_ENABLE2FIQ32__ENABLE 0x1
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#define BF_ICOLL_CTRL_ENABLE2FIQ32(v) (((v) & 0x1) << 24)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ32(v) BM_ICOLL_CTRL_ENABLE2FIQ32
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#define BF_ICOLL_CTRL_ENABLE2FIQ32_V(e) BF_ICOLL_CTRL_ENABLE2FIQ32(BV_ICOLL_CTRL_ENABLE2FIQ32__##e)
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#define BFM_ICOLL_CTRL_ENABLE2FIQ32_V(v) BM_ICOLL_CTRL_ENABLE2FIQ32
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#define BP_ICOLL_CTRL_BYPASS_FSM 20
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#define BM_ICOLL_CTRL_BYPASS_FSM 0x100000
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#define BV_ICOLL_CTRL_BYPASS_FSM__NORMAL 0x0
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#define BV_ICOLL_CTRL_BYPASS_FSM__BYPASS 0x1
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#define BF_ICOLL_CTRL_BYPASS_FSM(v) (((v) & 0x1) << 20)
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#define BFM_ICOLL_CTRL_BYPASS_FSM(v) BM_ICOLL_CTRL_BYPASS_FSM
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#define BF_ICOLL_CTRL_BYPASS_FSM_V(e) BF_ICOLL_CTRL_BYPASS_FSM(BV_ICOLL_CTRL_BYPASS_FSM__##e)
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#define BFM_ICOLL_CTRL_BYPASS_FSM_V(v) BM_ICOLL_CTRL_BYPASS_FSM
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#define BP_ICOLL_CTRL_NO_NESTING 19
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#define BM_ICOLL_CTRL_NO_NESTING 0x80000
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#define BV_ICOLL_CTRL_NO_NESTING__NORMAL 0x0
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#define BV_ICOLL_CTRL_NO_NESTING__NO_NEST 0x1
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#define BF_ICOLL_CTRL_NO_NESTING(v) (((v) & 0x1) << 19)
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#define BFM_ICOLL_CTRL_NO_NESTING(v) BM_ICOLL_CTRL_NO_NESTING
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#define BF_ICOLL_CTRL_NO_NESTING_V(e) BF_ICOLL_CTRL_NO_NESTING(BV_ICOLL_CTRL_NO_NESTING__##e)
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#define BFM_ICOLL_CTRL_NO_NESTING_V(v) BM_ICOLL_CTRL_NO_NESTING
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#define BP_ICOLL_CTRL_ARM_RSE_MODE 18
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#define BM_ICOLL_CTRL_ARM_RSE_MODE 0x40000
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#define BV_ICOLL_CTRL_ARM_RSE_MODE__MUST_WRITE 0x0
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#define BV_ICOLL_CTRL_ARM_RSE_MODE__READ_SIDE_EFFECT 0x1
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#define BF_ICOLL_CTRL_ARM_RSE_MODE(v) (((v) & 0x1) << 18)
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#define BFM_ICOLL_CTRL_ARM_RSE_MODE(v) BM_ICOLL_CTRL_ARM_RSE_MODE
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#define BF_ICOLL_CTRL_ARM_RSE_MODE_V(e) BF_ICOLL_CTRL_ARM_RSE_MODE(BV_ICOLL_CTRL_ARM_RSE_MODE__##e)
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#define BFM_ICOLL_CTRL_ARM_RSE_MODE_V(v) BM_ICOLL_CTRL_ARM_RSE_MODE
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#define BP_ICOLL_CTRL_FIQ_FINAL_ENABLE 17
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#define BM_ICOLL_CTRL_FIQ_FINAL_ENABLE 0x20000
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#define BV_ICOLL_CTRL_FIQ_FINAL_ENABLE__DISABLE 0x0
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#define BV_ICOLL_CTRL_FIQ_FINAL_ENABLE__ENABLE 0x1
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#define BF_ICOLL_CTRL_FIQ_FINAL_ENABLE(v) (((v) & 0x1) << 17)
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#define BFM_ICOLL_CTRL_FIQ_FINAL_ENABLE(v) BM_ICOLL_CTRL_FIQ_FINAL_ENABLE
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#define BF_ICOLL_CTRL_FIQ_FINAL_ENABLE_V(e) BF_ICOLL_CTRL_FIQ_FINAL_ENABLE(BV_ICOLL_CTRL_FIQ_FINAL_ENABLE__##e)
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#define BFM_ICOLL_CTRL_FIQ_FINAL_ENABLE_V(v) BM_ICOLL_CTRL_FIQ_FINAL_ENABLE
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#define BP_ICOLL_CTRL_IRQ_FINAL_ENABLE 16
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#define BM_ICOLL_CTRL_IRQ_FINAL_ENABLE 0x10000
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#define BV_ICOLL_CTRL_IRQ_FINAL_ENABLE__DISABLE 0x0
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#define BV_ICOLL_CTRL_IRQ_FINAL_ENABLE__ENABLE 0x1
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#define BF_ICOLL_CTRL_IRQ_FINAL_ENABLE(v) (((v) & 0x1) << 16)
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#define BFM_ICOLL_CTRL_IRQ_FINAL_ENABLE(v) BM_ICOLL_CTRL_IRQ_FINAL_ENABLE
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#define BF_ICOLL_CTRL_IRQ_FINAL_ENABLE_V(e) BF_ICOLL_CTRL_IRQ_FINAL_ENABLE(BV_ICOLL_CTRL_IRQ_FINAL_ENABLE__##e)
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#define BFM_ICOLL_CTRL_IRQ_FINAL_ENABLE_V(v) BM_ICOLL_CTRL_IRQ_FINAL_ENABLE
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#define HW_ICOLL_STAT HW(ICOLL_STAT)
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#define HWA_ICOLL_STAT (0x80000000 + 0x30)
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#define HWT_ICOLL_STAT HWIO_32_RW
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#define HWN_ICOLL_STAT ICOLL_STAT
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#define HWI_ICOLL_STAT
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#define BP_ICOLL_STAT_VECTOR_NUMBER 0
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#define BM_ICOLL_STAT_VECTOR_NUMBER 0x3f
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#define BF_ICOLL_STAT_VECTOR_NUMBER(v) (((v) & 0x3f) << 0)
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#define BFM_ICOLL_STAT_VECTOR_NUMBER(v) BM_ICOLL_STAT_VECTOR_NUMBER
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#define BF_ICOLL_STAT_VECTOR_NUMBER_V(e) BF_ICOLL_STAT_VECTOR_NUMBER(BV_ICOLL_STAT_VECTOR_NUMBER__##e)
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#define BFM_ICOLL_STAT_VECTOR_NUMBER_V(v) BM_ICOLL_STAT_VECTOR_NUMBER
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#define HW_ICOLL_VBASE HW(ICOLL_VBASE)
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#define HWA_ICOLL_VBASE (0x80000000 + 0x160)
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#define HWT_ICOLL_VBASE HWIO_32_RW
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#define HWN_ICOLL_VBASE ICOLL_VBASE
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#define HWI_ICOLL_VBASE
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#define HW_ICOLL_VBASE_SET HW(ICOLL_VBASE_SET)
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#define HWA_ICOLL_VBASE_SET (HWA_ICOLL_VBASE + 0x4)
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#define HWT_ICOLL_VBASE_SET HWIO_32_WO
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#define HWN_ICOLL_VBASE_SET ICOLL_VBASE
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#define HWI_ICOLL_VBASE_SET
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#define HW_ICOLL_VBASE_CLR HW(ICOLL_VBASE_CLR)
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#define HWA_ICOLL_VBASE_CLR (HWA_ICOLL_VBASE + 0x8)
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#define HWT_ICOLL_VBASE_CLR HWIO_32_WO
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#define HWN_ICOLL_VBASE_CLR ICOLL_VBASE
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#define HWI_ICOLL_VBASE_CLR
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#define HW_ICOLL_VBASE_TOG HW(ICOLL_VBASE_TOG)
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#define HWA_ICOLL_VBASE_TOG (HWA_ICOLL_VBASE + 0xc)
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#define HWT_ICOLL_VBASE_TOG HWIO_32_WO
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#define HWN_ICOLL_VBASE_TOG ICOLL_VBASE
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#define HWI_ICOLL_VBASE_TOG
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#define BP_ICOLL_VBASE_TABLE_ADDRESS 2
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#define BM_ICOLL_VBASE_TABLE_ADDRESS 0xfffffffc
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#define BF_ICOLL_VBASE_TABLE_ADDRESS(v) (((v) & 0x3fffffff) << 2)
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#define BFM_ICOLL_VBASE_TABLE_ADDRESS(v) BM_ICOLL_VBASE_TABLE_ADDRESS
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#define BF_ICOLL_VBASE_TABLE_ADDRESS_V(e) BF_ICOLL_VBASE_TABLE_ADDRESS(BV_ICOLL_VBASE_TABLE_ADDRESS__##e)
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#define BFM_ICOLL_VBASE_TABLE_ADDRESS_V(v) BM_ICOLL_VBASE_TABLE_ADDRESS
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#define HW_ICOLL_DEBUG HW(ICOLL_DEBUG)
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#define HWA_ICOLL_DEBUG (0x80000000 + 0x170)
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#define HWT_ICOLL_DEBUG HWIO_32_RW
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#define HWN_ICOLL_DEBUG ICOLL_DEBUG
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#define HWI_ICOLL_DEBUG
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#define BP_ICOLL_DEBUG_INSERVICE 28
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#define BM_ICOLL_DEBUG_INSERVICE 0xf0000000
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#define BV_ICOLL_DEBUG_INSERVICE__LEVEL0 0x1
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#define BV_ICOLL_DEBUG_INSERVICE__LEVEL1 0x2
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#define BV_ICOLL_DEBUG_INSERVICE__LEVEL2 0x4
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#define BV_ICOLL_DEBUG_INSERVICE__LEVEL3 0x8
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#define BF_ICOLL_DEBUG_INSERVICE(v) (((v) & 0xf) << 28)
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#define BFM_ICOLL_DEBUG_INSERVICE(v) BM_ICOLL_DEBUG_INSERVICE
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#define BF_ICOLL_DEBUG_INSERVICE_V(e) BF_ICOLL_DEBUG_INSERVICE(BV_ICOLL_DEBUG_INSERVICE__##e)
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#define BFM_ICOLL_DEBUG_INSERVICE_V(v) BM_ICOLL_DEBUG_INSERVICE
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#define BP_ICOLL_DEBUG_LEVEL_REQUESTS 24
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#define BM_ICOLL_DEBUG_LEVEL_REQUESTS 0xf000000
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#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL0 0x1
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#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL1 0x2
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#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL2 0x4
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#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL3 0x8
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#define BF_ICOLL_DEBUG_LEVEL_REQUESTS(v) (((v) & 0xf) << 24)
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#define BFM_ICOLL_DEBUG_LEVEL_REQUESTS(v) BM_ICOLL_DEBUG_LEVEL_REQUESTS
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#define BF_ICOLL_DEBUG_LEVEL_REQUESTS_V(e) BF_ICOLL_DEBUG_LEVEL_REQUESTS(BV_ICOLL_DEBUG_LEVEL_REQUESTS__##e)
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#define BFM_ICOLL_DEBUG_LEVEL_REQUESTS_V(v) BM_ICOLL_DEBUG_LEVEL_REQUESTS
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#define BP_ICOLL_DEBUG_REQUESTS_BY_LEVEL 20
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#define BM_ICOLL_DEBUG_REQUESTS_BY_LEVEL 0xf00000
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#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL0 0x1
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#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL1 0x2
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#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL2 0x4
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#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL3 0x8
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#define BF_ICOLL_DEBUG_REQUESTS_BY_LEVEL(v) (((v) & 0xf) << 20)
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#define BFM_ICOLL_DEBUG_REQUESTS_BY_LEVEL(v) BM_ICOLL_DEBUG_REQUESTS_BY_LEVEL
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#define BF_ICOLL_DEBUG_REQUESTS_BY_LEVEL_V(e) BF_ICOLL_DEBUG_REQUESTS_BY_LEVEL(BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__##e)
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#define BFM_ICOLL_DEBUG_REQUESTS_BY_LEVEL_V(v) BM_ICOLL_DEBUG_REQUESTS_BY_LEVEL
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#define BP_ICOLL_DEBUG_FIQ 17
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#define BM_ICOLL_DEBUG_FIQ 0x20000
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#define BV_ICOLL_DEBUG_FIQ__NO_FIQ_REQUESTED 0x0
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#define BV_ICOLL_DEBUG_FIQ__FIQ_REQUESTED 0x1
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#define BF_ICOLL_DEBUG_FIQ(v) (((v) & 0x1) << 17)
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#define BFM_ICOLL_DEBUG_FIQ(v) BM_ICOLL_DEBUG_FIQ
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#define BF_ICOLL_DEBUG_FIQ_V(e) BF_ICOLL_DEBUG_FIQ(BV_ICOLL_DEBUG_FIQ__##e)
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#define BFM_ICOLL_DEBUG_FIQ_V(v) BM_ICOLL_DEBUG_FIQ
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#define BP_ICOLL_DEBUG_IRQ 16
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#define BM_ICOLL_DEBUG_IRQ 0x10000
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#define BV_ICOLL_DEBUG_IRQ__NO_IRQ_REQUESTED 0x0
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#define BV_ICOLL_DEBUG_IRQ__IRQ_REQUESTED 0x1
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#define BF_ICOLL_DEBUG_IRQ(v) (((v) & 0x1) << 16)
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#define BFM_ICOLL_DEBUG_IRQ(v) BM_ICOLL_DEBUG_IRQ
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#define BF_ICOLL_DEBUG_IRQ_V(e) BF_ICOLL_DEBUG_IRQ(BV_ICOLL_DEBUG_IRQ__##e)
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#define BFM_ICOLL_DEBUG_IRQ_V(v) BM_ICOLL_DEBUG_IRQ
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#define BP_ICOLL_DEBUG_VECTOR_FSM 0
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#define BM_ICOLL_DEBUG_VECTOR_FSM 0x3ff
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_IDLE 0x0
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE1 0x1
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE2 0x2
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_PENDING 0x4
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE3 0x8
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE4 0x10
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_ISR_RUNNING1 0x20
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_ISR_RUNNING2 0x40
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_ISR_RUNNING3 0x80
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE5 0x100
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#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE6 0x200
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#define BF_ICOLL_DEBUG_VECTOR_FSM(v) (((v) & 0x3ff) << 0)
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#define BFM_ICOLL_DEBUG_VECTOR_FSM(v) BM_ICOLL_DEBUG_VECTOR_FSM
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#define BF_ICOLL_DEBUG_VECTOR_FSM_V(e) BF_ICOLL_DEBUG_VECTOR_FSM(BV_ICOLL_DEBUG_VECTOR_FSM__##e)
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#define BFM_ICOLL_DEBUG_VECTOR_FSM_V(v) BM_ICOLL_DEBUG_VECTOR_FSM
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#define HW_ICOLL_DBGFLAG HW(ICOLL_DBGFLAG)
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#define HWA_ICOLL_DBGFLAG (0x80000000 + 0x1a0)
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#define HWT_ICOLL_DBGFLAG HWIO_32_RW
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#define HWN_ICOLL_DBGFLAG ICOLL_DBGFLAG
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#define HWI_ICOLL_DBGFLAG
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#define HW_ICOLL_DBGFLAG_SET HW(ICOLL_DBGFLAG_SET)
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#define HWA_ICOLL_DBGFLAG_SET (HWA_ICOLL_DBGFLAG + 0x4)
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#define HWT_ICOLL_DBGFLAG_SET HWIO_32_WO
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#define HWN_ICOLL_DBGFLAG_SET ICOLL_DBGFLAG
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#define HWI_ICOLL_DBGFLAG_SET
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#define HW_ICOLL_DBGFLAG_CLR HW(ICOLL_DBGFLAG_CLR)
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#define HWA_ICOLL_DBGFLAG_CLR (HWA_ICOLL_DBGFLAG + 0x8)
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#define HWT_ICOLL_DBGFLAG_CLR HWIO_32_WO
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#define HWN_ICOLL_DBGFLAG_CLR ICOLL_DBGFLAG
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#define HWI_ICOLL_DBGFLAG_CLR
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#define HW_ICOLL_DBGFLAG_TOG HW(ICOLL_DBGFLAG_TOG)
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#define HWA_ICOLL_DBGFLAG_TOG (HWA_ICOLL_DBGFLAG + 0xc)
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#define HWT_ICOLL_DBGFLAG_TOG HWIO_32_WO
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#define HWN_ICOLL_DBGFLAG_TOG ICOLL_DBGFLAG
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#define HWI_ICOLL_DBGFLAG_TOG
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#define BP_ICOLL_DBGFLAG_FLAG 0
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#define BM_ICOLL_DBGFLAG_FLAG 0xffff
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#define BF_ICOLL_DBGFLAG_FLAG(v) (((v) & 0xffff) << 0)
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#define BFM_ICOLL_DBGFLAG_FLAG(v) BM_ICOLL_DBGFLAG_FLAG
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#define BF_ICOLL_DBGFLAG_FLAG_V(e) BF_ICOLL_DBGFLAG_FLAG(BV_ICOLL_DBGFLAG_FLAG__##e)
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#define BFM_ICOLL_DBGFLAG_FLAG_V(v) BM_ICOLL_DBGFLAG_FLAG
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#define HW_ICOLL_DBGREQUESTn(_n1) HW(ICOLL_DBGREQUESTn(_n1))
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#define HWA_ICOLL_DBGREQUESTn(_n1) (0x80000000 + 0x1b0 + (_n1) * 0x10)
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#define HWT_ICOLL_DBGREQUESTn(_n1) HWIO_32_RW
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#define HWN_ICOLL_DBGREQUESTn(_n1) ICOLL_DBGREQUESTn
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#define HWI_ICOLL_DBGREQUESTn(_n1) (_n1)
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#define BP_ICOLL_DBGREQUESTn_BITS 0
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#define BM_ICOLL_DBGREQUESTn_BITS 0xffffffff
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#define BF_ICOLL_DBGREQUESTn_BITS(v) (((v) & 0xffffffff) << 0)
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#define BFM_ICOLL_DBGREQUESTn_BITS(v) BM_ICOLL_DBGREQUESTn_BITS
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#define BF_ICOLL_DBGREQUESTn_BITS_V(e) BF_ICOLL_DBGREQUESTn_BITS(BV_ICOLL_DBGREQUESTn_BITS__##e)
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#define BFM_ICOLL_DBGREQUESTn_BITS_V(v) BM_ICOLL_DBGREQUESTn_BITS
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#define HW_ICOLL_RAWn(_n1) HW(ICOLL_RAWn(_n1))
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#define HWA_ICOLL_RAWn(_n1) (0x80000000 + 0x40 + (_n1) * 0x10)
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#define HWT_ICOLL_RAWn(_n1) HWIO_32_RW
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#define HWN_ICOLL_RAWn(_n1) ICOLL_RAWn
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#define HWI_ICOLL_RAWn(_n1) (_n1)
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#define BP_ICOLL_RAWn_RAW_IRQS 0
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#define BM_ICOLL_RAWn_RAW_IRQS 0xffffffff
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#define BF_ICOLL_RAWn_RAW_IRQS(v) (((v) & 0xffffffff) << 0)
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#define BFM_ICOLL_RAWn_RAW_IRQS(v) BM_ICOLL_RAWn_RAW_IRQS
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#define BF_ICOLL_RAWn_RAW_IRQS_V(e) BF_ICOLL_RAWn_RAW_IRQS(BV_ICOLL_RAWn_RAW_IRQS__##e)
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#define BFM_ICOLL_RAWn_RAW_IRQS_V(v) BM_ICOLL_RAWn_RAW_IRQS
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#define HW_ICOLL_DBGREADn(_n1) HW(ICOLL_DBGREADn(_n1))
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#define HWA_ICOLL_DBGREADn(_n1) (0x80000000 + 0x180 + (_n1) * 0x10)
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#define HWT_ICOLL_DBGREADn(_n1) HWIO_32_RW
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#define HWN_ICOLL_DBGREADn(_n1) ICOLL_DBGREADn
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#define HWI_ICOLL_DBGREADn(_n1) (_n1)
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#define BP_ICOLL_DBGREADn_VALUE 0
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#define BM_ICOLL_DBGREADn_VALUE 0xffffffff
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#define BF_ICOLL_DBGREADn_VALUE(v) (((v) & 0xffffffff) << 0)
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#define BFM_ICOLL_DBGREADn_VALUE(v) BM_ICOLL_DBGREADn_VALUE
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#define BF_ICOLL_DBGREADn_VALUE_V(e) BF_ICOLL_DBGREADn_VALUE(BV_ICOLL_DBGREADn_VALUE__##e)
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#define BFM_ICOLL_DBGREADn_VALUE_V(v) BM_ICOLL_DBGREADn_VALUE
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#define HW_ICOLL_PRIORITYn(_n1) HW(ICOLL_PRIORITYn(_n1))
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#define HWA_ICOLL_PRIORITYn(_n1) (0x80000000 + 0x60 + (_n1) * 0x10)
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#define HWT_ICOLL_PRIORITYn(_n1) HWIO_32_RW
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#define HWN_ICOLL_PRIORITYn(_n1) ICOLL_PRIORITYn
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#define HWI_ICOLL_PRIORITYn(_n1) (_n1)
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#define HW_ICOLL_PRIORITYn_SET(_n1) HW(ICOLL_PRIORITYn_SET(_n1))
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#define HWA_ICOLL_PRIORITYn_SET(_n1) (HWA_ICOLL_PRIORITYn(_n1) + 0x4)
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#define HWT_ICOLL_PRIORITYn_SET(_n1) HWIO_32_WO
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#define HWN_ICOLL_PRIORITYn_SET(_n1) ICOLL_PRIORITYn
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#define HWI_ICOLL_PRIORITYn_SET(_n1) (_n1)
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#define HW_ICOLL_PRIORITYn_CLR(_n1) HW(ICOLL_PRIORITYn_CLR(_n1))
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#define HWA_ICOLL_PRIORITYn_CLR(_n1) (HWA_ICOLL_PRIORITYn(_n1) + 0x8)
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#define HWT_ICOLL_PRIORITYn_CLR(_n1) HWIO_32_WO
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#define HWN_ICOLL_PRIORITYn_CLR(_n1) ICOLL_PRIORITYn
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#define HWI_ICOLL_PRIORITYn_CLR(_n1) (_n1)
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#define HW_ICOLL_PRIORITYn_TOG(_n1) HW(ICOLL_PRIORITYn_TOG(_n1))
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#define HWA_ICOLL_PRIORITYn_TOG(_n1) (HWA_ICOLL_PRIORITYn(_n1) + 0xc)
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#define HWT_ICOLL_PRIORITYn_TOG(_n1) HWIO_32_WO
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#define HWN_ICOLL_PRIORITYn_TOG(_n1) ICOLL_PRIORITYn
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#define HWI_ICOLL_PRIORITYn_TOG(_n1) (_n1)
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#define BP_ICOLL_PRIORITYn_SOFTIRQ3 27
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#define BM_ICOLL_PRIORITYn_SOFTIRQ3 0x8000000
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#define BV_ICOLL_PRIORITYn_SOFTIRQ3__NO_INTERRUPT 0x0
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#define BV_ICOLL_PRIORITYn_SOFTIRQ3__FORCE_INTERRUPT 0x1
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#define BF_ICOLL_PRIORITYn_SOFTIRQ3(v) (((v) & 0x1) << 27)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ3(v) BM_ICOLL_PRIORITYn_SOFTIRQ3
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#define BF_ICOLL_PRIORITYn_SOFTIRQ3_V(e) BF_ICOLL_PRIORITYn_SOFTIRQ3(BV_ICOLL_PRIORITYn_SOFTIRQ3__##e)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ3_V(v) BM_ICOLL_PRIORITYn_SOFTIRQ3
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#define BP_ICOLL_PRIORITYn_ENABLE3 26
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#define BM_ICOLL_PRIORITYn_ENABLE3 0x4000000
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#define BV_ICOLL_PRIORITYn_ENABLE3__DISABLE 0x0
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#define BV_ICOLL_PRIORITYn_ENABLE3__ENABLE 0x1
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#define BF_ICOLL_PRIORITYn_ENABLE3(v) (((v) & 0x1) << 26)
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#define BFM_ICOLL_PRIORITYn_ENABLE3(v) BM_ICOLL_PRIORITYn_ENABLE3
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#define BF_ICOLL_PRIORITYn_ENABLE3_V(e) BF_ICOLL_PRIORITYn_ENABLE3(BV_ICOLL_PRIORITYn_ENABLE3__##e)
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#define BFM_ICOLL_PRIORITYn_ENABLE3_V(v) BM_ICOLL_PRIORITYn_ENABLE3
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#define BP_ICOLL_PRIORITYn_PRIORITY3 24
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#define BM_ICOLL_PRIORITYn_PRIORITY3 0x3000000
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#define BV_ICOLL_PRIORITYn_PRIORITY3__LEVEL0 0x0
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#define BV_ICOLL_PRIORITYn_PRIORITY3__LEVEL1 0x1
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#define BV_ICOLL_PRIORITYn_PRIORITY3__LEVEL2 0x2
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#define BV_ICOLL_PRIORITYn_PRIORITY3__LEVEL3 0x3
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#define BF_ICOLL_PRIORITYn_PRIORITY3(v) (((v) & 0x3) << 24)
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#define BFM_ICOLL_PRIORITYn_PRIORITY3(v) BM_ICOLL_PRIORITYn_PRIORITY3
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#define BF_ICOLL_PRIORITYn_PRIORITY3_V(e) BF_ICOLL_PRIORITYn_PRIORITY3(BV_ICOLL_PRIORITYn_PRIORITY3__##e)
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#define BFM_ICOLL_PRIORITYn_PRIORITY3_V(v) BM_ICOLL_PRIORITYn_PRIORITY3
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#define BP_ICOLL_PRIORITYn_SOFTIRQ2 19
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#define BM_ICOLL_PRIORITYn_SOFTIRQ2 0x80000
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#define BV_ICOLL_PRIORITYn_SOFTIRQ2__NO_INTERRUPT 0x0
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#define BV_ICOLL_PRIORITYn_SOFTIRQ2__FORCE_INTERRUPT 0x1
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#define BF_ICOLL_PRIORITYn_SOFTIRQ2(v) (((v) & 0x1) << 19)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ2(v) BM_ICOLL_PRIORITYn_SOFTIRQ2
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#define BF_ICOLL_PRIORITYn_SOFTIRQ2_V(e) BF_ICOLL_PRIORITYn_SOFTIRQ2(BV_ICOLL_PRIORITYn_SOFTIRQ2__##e)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ2_V(v) BM_ICOLL_PRIORITYn_SOFTIRQ2
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#define BP_ICOLL_PRIORITYn_ENABLE2 18
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#define BM_ICOLL_PRIORITYn_ENABLE2 0x40000
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#define BV_ICOLL_PRIORITYn_ENABLE2__DISABLE 0x0
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#define BV_ICOLL_PRIORITYn_ENABLE2__ENABLE 0x1
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#define BF_ICOLL_PRIORITYn_ENABLE2(v) (((v) & 0x1) << 18)
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#define BFM_ICOLL_PRIORITYn_ENABLE2(v) BM_ICOLL_PRIORITYn_ENABLE2
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#define BF_ICOLL_PRIORITYn_ENABLE2_V(e) BF_ICOLL_PRIORITYn_ENABLE2(BV_ICOLL_PRIORITYn_ENABLE2__##e)
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#define BFM_ICOLL_PRIORITYn_ENABLE2_V(v) BM_ICOLL_PRIORITYn_ENABLE2
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#define BP_ICOLL_PRIORITYn_PRIORITY2 16
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#define BM_ICOLL_PRIORITYn_PRIORITY2 0x30000
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#define BV_ICOLL_PRIORITYn_PRIORITY2__LEVEL0 0x0
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#define BV_ICOLL_PRIORITYn_PRIORITY2__LEVEL1 0x1
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#define BV_ICOLL_PRIORITYn_PRIORITY2__LEVEL2 0x2
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#define BV_ICOLL_PRIORITYn_PRIORITY2__LEVEL3 0x3
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#define BF_ICOLL_PRIORITYn_PRIORITY2(v) (((v) & 0x3) << 16)
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#define BFM_ICOLL_PRIORITYn_PRIORITY2(v) BM_ICOLL_PRIORITYn_PRIORITY2
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#define BF_ICOLL_PRIORITYn_PRIORITY2_V(e) BF_ICOLL_PRIORITYn_PRIORITY2(BV_ICOLL_PRIORITYn_PRIORITY2__##e)
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#define BFM_ICOLL_PRIORITYn_PRIORITY2_V(v) BM_ICOLL_PRIORITYn_PRIORITY2
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#define BP_ICOLL_PRIORITYn_SOFTIRQ1 11
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#define BM_ICOLL_PRIORITYn_SOFTIRQ1 0x800
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#define BV_ICOLL_PRIORITYn_SOFTIRQ1__NO_INTERRUPT 0x0
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#define BV_ICOLL_PRIORITYn_SOFTIRQ1__FORCE_INTERRUPT 0x1
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#define BF_ICOLL_PRIORITYn_SOFTIRQ1(v) (((v) & 0x1) << 11)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ1(v) BM_ICOLL_PRIORITYn_SOFTIRQ1
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#define BF_ICOLL_PRIORITYn_SOFTIRQ1_V(e) BF_ICOLL_PRIORITYn_SOFTIRQ1(BV_ICOLL_PRIORITYn_SOFTIRQ1__##e)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ1_V(v) BM_ICOLL_PRIORITYn_SOFTIRQ1
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#define BP_ICOLL_PRIORITYn_ENABLE1 10
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#define BM_ICOLL_PRIORITYn_ENABLE1 0x400
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#define BV_ICOLL_PRIORITYn_ENABLE1__DISABLE 0x0
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#define BV_ICOLL_PRIORITYn_ENABLE1__ENABLE 0x1
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#define BF_ICOLL_PRIORITYn_ENABLE1(v) (((v) & 0x1) << 10)
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#define BFM_ICOLL_PRIORITYn_ENABLE1(v) BM_ICOLL_PRIORITYn_ENABLE1
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#define BF_ICOLL_PRIORITYn_ENABLE1_V(e) BF_ICOLL_PRIORITYn_ENABLE1(BV_ICOLL_PRIORITYn_ENABLE1__##e)
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#define BFM_ICOLL_PRIORITYn_ENABLE1_V(v) BM_ICOLL_PRIORITYn_ENABLE1
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#define BP_ICOLL_PRIORITYn_PRIORITY1 8
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#define BM_ICOLL_PRIORITYn_PRIORITY1 0x300
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#define BV_ICOLL_PRIORITYn_PRIORITY1__LEVEL0 0x0
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#define BV_ICOLL_PRIORITYn_PRIORITY1__LEVEL1 0x1
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#define BV_ICOLL_PRIORITYn_PRIORITY1__LEVEL2 0x2
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#define BV_ICOLL_PRIORITYn_PRIORITY1__LEVEL3 0x3
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#define BF_ICOLL_PRIORITYn_PRIORITY1(v) (((v) & 0x3) << 8)
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#define BFM_ICOLL_PRIORITYn_PRIORITY1(v) BM_ICOLL_PRIORITYn_PRIORITY1
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#define BF_ICOLL_PRIORITYn_PRIORITY1_V(e) BF_ICOLL_PRIORITYn_PRIORITY1(BV_ICOLL_PRIORITYn_PRIORITY1__##e)
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#define BFM_ICOLL_PRIORITYn_PRIORITY1_V(v) BM_ICOLL_PRIORITYn_PRIORITY1
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#define BP_ICOLL_PRIORITYn_SOFTIRQ0 3
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#define BM_ICOLL_PRIORITYn_SOFTIRQ0 0x8
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#define BV_ICOLL_PRIORITYn_SOFTIRQ0__NO_INTERRUPT 0x0
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#define BV_ICOLL_PRIORITYn_SOFTIRQ0__FORCE_INTERRUPT 0x1
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#define BF_ICOLL_PRIORITYn_SOFTIRQ0(v) (((v) & 0x1) << 3)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ0(v) BM_ICOLL_PRIORITYn_SOFTIRQ0
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#define BF_ICOLL_PRIORITYn_SOFTIRQ0_V(e) BF_ICOLL_PRIORITYn_SOFTIRQ0(BV_ICOLL_PRIORITYn_SOFTIRQ0__##e)
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#define BFM_ICOLL_PRIORITYn_SOFTIRQ0_V(v) BM_ICOLL_PRIORITYn_SOFTIRQ0
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#define BP_ICOLL_PRIORITYn_ENABLE0 2
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#define BM_ICOLL_PRIORITYn_ENABLE0 0x4
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#define BV_ICOLL_PRIORITYn_ENABLE0__DISABLE 0x0
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#define BV_ICOLL_PRIORITYn_ENABLE0__ENABLE 0x1
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#define BF_ICOLL_PRIORITYn_ENABLE0(v) (((v) & 0x1) << 2)
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#define BFM_ICOLL_PRIORITYn_ENABLE0(v) BM_ICOLL_PRIORITYn_ENABLE0
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#define BF_ICOLL_PRIORITYn_ENABLE0_V(e) BF_ICOLL_PRIORITYn_ENABLE0(BV_ICOLL_PRIORITYn_ENABLE0__##e)
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#define BFM_ICOLL_PRIORITYn_ENABLE0_V(v) BM_ICOLL_PRIORITYn_ENABLE0
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#define BP_ICOLL_PRIORITYn_PRIORITY0 0
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#define BM_ICOLL_PRIORITYn_PRIORITY0 0x3
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#define BV_ICOLL_PRIORITYn_PRIORITY0__LEVEL0 0x0
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#define BV_ICOLL_PRIORITYn_PRIORITY0__LEVEL1 0x1
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#define BV_ICOLL_PRIORITYn_PRIORITY0__LEVEL2 0x2
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#define BV_ICOLL_PRIORITYn_PRIORITY0__LEVEL3 0x3
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#define BF_ICOLL_PRIORITYn_PRIORITY0(v) (((v) & 0x3) << 0)
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#define BFM_ICOLL_PRIORITYn_PRIORITY0(v) BM_ICOLL_PRIORITYn_PRIORITY0
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#define BF_ICOLL_PRIORITYn_PRIORITY0_V(e) BF_ICOLL_PRIORITYn_PRIORITY0(BV_ICOLL_PRIORITYn_PRIORITY0__##e)
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#define BFM_ICOLL_PRIORITYn_PRIORITY0_V(v) BM_ICOLL_PRIORITYn_PRIORITY0
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#endif /* __HEADERGEN_STMP3600_ICOLL_H__*/
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