590501cfe4
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14805 a1c6a512-1295-4272-9138-f99709370657
81 lines
2.8 KiB
C
81 lines
2.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (c) 2007 Will Robertson
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "cpu.h"
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#include "spi-imx31.h"
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#include "debug.h"
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#include "kernel.h"
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/* This is all based on communicating with the MC13783 PMU which is on
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* CSPI2 with the chip select at 0. The LCD controller resides on
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* CSPI3 cs1, but we have no idea how to communicate to it */
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void spi_init(void) {
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CSPI_CONREG2 |= (2 << 20); // Burst will be triggered at SPI_RDY low
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CSPI_CONREG2 |= (2 << 16); // Clock = IPG_CLK/16 - we want about 20mhz
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CSPI_CONREG2 |= (31 << 8); // All 32 bits are to be transferred
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CSPI_CONREG2 |= (1 << 3); // Start burst on TXFIFO write.
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CSPI_CONREG2 |= (1 << 1); // Master mode.
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CSPI_CONREG2 |= 1; // Enable CSPI2;
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}
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static int spi_transfer(int address, long data, long* buffer, bool read) {
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unsigned long packet = 0;
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if(!read) {
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/* Set the appropriate bit in the packet to indicate a write */
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packet |= (1<<31);
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}
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/* Set the address of the packet */
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packet |= (address << 25);
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/* Ensure data only occupies 24 bits, then mash the data into the packet */
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data &= ~(DATAMASK);
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packet |= data;
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/* Wait for some room in TXFIFO */
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while(CSPI_STATREG2 & (1<<2));
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/* Send the packet */
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CSPI_TXDATA2 = packet;
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/* Poll the XCH bit to wait for the end of the transfer, with
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* a one second timeout */
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int newtick = current_tick + HZ;
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while((CSPI_CONREG2 & (1<<2)) && (current_tick < newtick));
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if(newtick > current_tick) {
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*buffer = CSPI_RXDATA2;
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return 0;
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} else {
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/* Indicate the fact that the transfer timed out */
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return -1;
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}
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}
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void spi_send(int address, unsigned long data) {
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long dummy;
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if(spi_transfer(address, data, &dummy, false)) {
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DEBUGF("SPI Send timed out");
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}
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}
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void spi_read(int address, unsigned long* buffer) {
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if(spi_transfer(address, 0, buffer, true)) {
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DEBUGF("SPI read timed out");
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}
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}
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