b8ae97fe58
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30265 a1c6a512-1295-4272-9138-f99709370657
1321 lines
25 KiB
C
1321 lines
25 KiB
C
// Game_Music_Emu 0.5.2. http://www.slack.net/~ant/
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#include "hes_cpu.h"
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#include "blargg_endian.h"
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//#include "hes_cpu_log.h"
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/* Copyright (C) 2003-2006 Shay Green. This module is free software; you
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can redistribute it and/or modify it under the terms of the GNU Lesser
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General Public License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version. This
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module is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
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details. You should have received a copy of the GNU Lesser General Public
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License along with this module; if not, write to the Free Software Foundation,
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Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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// TODO: support T flag, including clearing it at appropriate times?
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// all zero-page should really use whatever is at page 1, but that would
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// reduce efficiency quite a bit
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int const ram_addr = 0x2000;
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#define FLUSH_TIME() (void) (s.time = s_time)
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#define CACHE_TIME() (void) (s_time = s.time)
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#include "hes_cpu_io.h"
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#include "blargg_source.h"
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#ifdef BLARGG_NONPORTABLE
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#define PAGE_OFFSET( addr ) (addr)
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#else
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#define PAGE_OFFSET( addr ) ((addr) & (page_size - 1))
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#endif
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// status flags
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int const st_n = 0x80;
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int const st_v = 0x40;
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int const st_t = 0x20;
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int const st_b = 0x10;
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int const st_d = 0x08;
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int const st_i = 0x04;
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int const st_z = 0x02;
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int const st_c = 0x01;
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void Cpu_init( struct Hes_Cpu* this )
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{
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this->state = &this->state_;
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}
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void Cpu_reset( struct Hes_Cpu* this )
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{
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check( this->state == &state_ );
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this->state = &this->state_;
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this->state_.time = 0;
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this->state_.base = 0;
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this->irq_time = (hes_time_t)future_hes_time;
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this->end_time = (hes_time_t)future_hes_time;
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this->r.status = st_i;
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this->r.sp = 0;
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this->r.pc = 0;
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this->r.a = 0;
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this->r.x = 0;
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this->r.y = 0;
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blargg_verify_byte_order();
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}
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void Cpu_set_mmr( struct Hes_Emu* this, int reg, int bank )
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{
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assert( (unsigned) reg <= page_count ); // allow page past end to be set
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assert( (unsigned) bank < 0x100 );
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this->cpu.mmr [reg] = bank;
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uint8_t const* code = CPU_SET_MMR( this, reg, bank );
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this->cpu.state->code_map [reg] = code - PAGE_OFFSET( reg << page_shift );
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}
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#define TIME (s_time + s.base)
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#define READ( addr ) CPU_READ( this, (addr), TIME )
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#define WRITE( addr, data ) {CPU_WRITE( this, (addr), (data), TIME );}
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#define READ_LOW( addr ) (cpu->ram [(int) (addr)])
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#define WRITE_LOW( addr, data ) (void) (READ_LOW( addr ) = (data))
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#define READ_PROG( addr ) (s.code_map [(addr) >> page_shift] [PAGE_OFFSET( addr )])
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#define SET_SP( v ) (sp = ((v) + 1) | 0x100)
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#define GET_SP() ((sp - 1) & 0xFF)
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#define PUSH( v ) ((sp = (sp - 1) | 0x100), WRITE_LOW( sp, v ))
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// even on x86, using short and unsigned char was slower
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typedef int fint16;
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typedef unsigned fuint16;
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typedef unsigned fuint8;
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typedef blargg_long fint32;
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bool Cpu_run( struct Hes_Emu* this, hes_time_t end_time )
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{
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bool illegal_encountered = false;
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// Set cpu end time
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struct Hes_Cpu* cpu = &this->cpu;
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cpu->state->time += Cpu_update_end_time( cpu, cpu->r.status, (cpu->end_time = end_time), cpu->irq_time );
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struct state_t s = cpu->state_;
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cpu->state = &s;
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// even on x86, using s.time in place of s_time was slower
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fint16 s_time = s.time;
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struct registers_t* r = &cpu->r;
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// registers
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fuint16 pc = r->pc;
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fuint8 a = r->a;
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fuint8 x = r->x;
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fuint8 y = r->y;
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fuint16 sp;
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SET_SP( r->sp );
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#define IS_NEG (nz & 0x8080)
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#define CALC_STATUS( out ) do {\
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out = status & (st_v | st_d | st_i);\
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out |= ((nz >> 8) | nz) & st_n;\
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out |= c >> 8 & st_c;\
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if ( !(nz & 0xFF) ) out |= st_z;\
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} while ( 0 )
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#define SET_STATUS( in ) do {\
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status = in & (st_v | st_d | st_i);\
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nz = in << 8;\
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c = nz;\
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nz |= ~in & st_z;\
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} while ( 0 )
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fuint8 status;
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fuint16 c; // carry set if (c & 0x100) != 0
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fuint16 nz; // Z set if (nz & 0xFF) == 0, N set if (nz & 0x8080) != 0
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{
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fuint8 temp = r->status;
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SET_STATUS( temp );
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}
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goto loop;
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branch_not_taken:
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s_time -= 2;
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loop:
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#ifndef NDEBUG
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{
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hes_time_t correct = end_time_;
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if ( !(status & st_i) && correct > irq_time_ )
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correct = irq_time_;
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check( s.base == correct );
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/*
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static long count;
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if ( count == 1844 ) Debugger();
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if ( s.base != correct ) dprintf( "%ld\n", count );
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count++;
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*/
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}
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#endif
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check( (unsigned) GET_SP() < 0x100 );
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check( (unsigned) a < 0x100 );
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check( (unsigned) x < 0x100 );
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uint8_t const* instr = s.code_map [pc >> page_shift];
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fuint8 opcode;
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// TODO: eliminate this special case
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#ifdef BLARGG_NONPORTABLE
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opcode = instr [pc];
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pc++;
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instr += pc;
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#else
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instr += PAGE_OFFSET( pc );
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opcode = *instr++;
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pc++;
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#endif
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// TODO: each reference lists slightly different timing values, ugh
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static uint8_t const clock_table [256] ICONST_ATTR =
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{// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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1,7,3, 4,6,4,6,7,3,2,2,2,7,5,7,6,// 0
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4,7,7, 4,6,4,6,7,2,5,2,2,7,5,7,6,// 1
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7,7,3, 4,4,4,6,7,4,2,2,2,5,5,7,6,// 2
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4,7,7, 2,4,4,6,7,2,5,2,2,5,5,7,6,// 3
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7,7,3, 4,8,4,6,7,3,2,2,2,4,5,7,6,// 4
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4,7,7, 5,2,4,6,7,2,5,3,2,2,5,7,6,// 5
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7,7,2, 2,4,4,6,7,4,2,2,2,7,5,7,6,// 6
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4,7,7,17,4,4,6,7,2,5,4,2,7,5,7,6,// 7
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4,7,2, 7,4,4,4,7,2,2,2,2,5,5,5,6,// 8
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4,7,7, 8,4,4,4,7,2,5,2,2,5,5,5,6,// 9
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2,7,2, 7,4,4,4,7,2,2,2,2,5,5,5,6,// A
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4,7,7, 8,4,4,4,7,2,5,2,2,5,5,5,6,// B
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2,7,2,17,4,4,6,7,2,2,2,2,5,5,7,6,// C
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4,7,7,17,2,4,6,7,2,5,3,2,2,5,7,6,// D
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2,7,2,17,4,4,6,7,2,2,2,2,5,5,7,6,// E
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4,7,7,17,2,4,6,7,2,5,4,2,2,5,7,6 // F
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}; // 0x00 was 8
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fuint16 data;
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data = clock_table [opcode];
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if ( (s_time += data) >= 0 )
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goto possibly_out_of_time;
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almost_out_of_time:
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data = *instr;
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#ifdef HES_CPU_LOG_H
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log_cpu( "new", pc - 1, opcode, instr [0], instr [1], instr [2],
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instr [3], instr [4], instr [5] );
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//log_opcode( opcode );
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#endif
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switch ( opcode )
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{
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possibly_out_of_time:
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if ( s_time < (int) data )
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goto almost_out_of_time;
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s_time -= data;
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goto out_of_time;
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// Macros
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#define GET_MSB() (instr [1])
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#define ADD_PAGE( out ) (pc++, out = data + 0x100 * GET_MSB());
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#define GET_ADDR() GET_LE16( instr )
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// TODO: is the penalty really always added? the original 6502 was much better
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//#define PAGE_CROSS_PENALTY( lsb ) (void) (s_time += (lsb) >> 8)
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#define PAGE_CROSS_PENALTY( lsb )
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// Branch
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// TODO: more efficient way to handle negative branch that wraps PC around
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#define BRANCH( cond )\
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{\
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fint16 offset = (int8_t) data;\
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pc++;\
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if ( !(cond) ) goto branch_not_taken;\
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pc = (uint16_t) (pc + offset);\
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goto loop;\
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}
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case 0xF0: // BEQ
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BRANCH( !((uint8_t) nz) );
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case 0xD0: // BNE
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BRANCH( (uint8_t) nz );
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case 0x10: // BPL
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BRANCH( !IS_NEG );
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case 0x90: // BCC
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BRANCH( !(c & 0x100) )
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case 0x30: // BMI
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BRANCH( IS_NEG )
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case 0x50: // BVC
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BRANCH( !(status & st_v) )
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case 0x70: // BVS
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BRANCH( status & st_v )
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case 0xB0: // BCS
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BRANCH( c & 0x100 )
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case 0x80: // BRA
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branch_taken:
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BRANCH( true );
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case 0xFF:
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if ( pc == idle_addr + 1 )
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goto idle_done;
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case 0x0F: // BBRn
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case 0x1F:
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case 0x2F:
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case 0x3F:
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case 0x4F:
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case 0x5F:
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case 0x6F:
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case 0x7F:
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case 0x8F: // BBSn
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case 0x9F:
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case 0xAF:
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case 0xBF:
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case 0xCF:
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case 0xDF:
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case 0xEF: {
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fuint16 t = 0x101 * READ_LOW( data );
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t ^= 0xFF;
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pc++;
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data = GET_MSB();
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BRANCH( t & (1 << (opcode >> 4)) )
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}
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case 0x4C: // JMP abs
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pc = GET_ADDR();
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goto loop;
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case 0x7C: // JMP (ind+X)
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data += x;
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case 0x6C:{// JMP (ind)
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data += 0x100 * GET_MSB();
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pc = GET_LE16( &READ_PROG( data ) );
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goto loop;
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}
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// Subroutine
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case 0x44: // BSR
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WRITE_LOW( 0x100 | (sp - 1), pc >> 8 );
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sp = (sp - 2) | 0x100;
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WRITE_LOW( sp, pc );
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goto branch_taken;
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case 0x20: { // JSR
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fuint16 temp = pc + 1;
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pc = GET_ADDR();
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WRITE_LOW( 0x100 | (sp - 1), temp >> 8 );
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sp = (sp - 2) | 0x100;
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WRITE_LOW( sp, temp );
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goto loop;
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}
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case 0x60: // RTS
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pc = 0x100 * READ_LOW( 0x100 | (sp - 0xFF) );
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pc += 1 + READ_LOW( sp );
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sp = (sp - 0xFE) | 0x100;
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goto loop;
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case 0x00: // BRK
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goto handle_brk;
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// Common
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case 0xBD:{// LDA abs,X
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PAGE_CROSS_PENALTY( data + x );
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fuint16 addr = GET_ADDR() + x;
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pc += 2;
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CPU_READ_FAST( this, addr, TIME, nz );
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a = nz;
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goto loop;
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}
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case 0x9D:{// STA abs,X
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fuint16 addr = GET_ADDR() + x;
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pc += 2;
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CPU_WRITE_FAST( this, addr, a, TIME );
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goto loop;
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}
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case 0x95: // STA zp,x
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data = (uint8_t) (data + x);
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case 0x85: // STA zp
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pc++;
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WRITE_LOW( data, a );
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goto loop;
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case 0xAE:{// LDX abs
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fuint16 addr = GET_ADDR();
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pc += 2;
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CPU_READ_FAST( this, addr, TIME, nz );
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x = nz;
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goto loop;
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}
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case 0xA5: // LDA zp
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a = nz = READ_LOW( data );
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pc++;
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goto loop;
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// Load/store
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{
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fuint16 addr;
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case 0x91: // STA (ind),Y
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addr = 0x100 * READ_LOW( (uint8_t) (data + 1) );
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addr += READ_LOW( data ) + y;
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pc++;
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goto sta_ptr;
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case 0x81: // STA (ind,X)
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data = (uint8_t) (data + x);
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case 0x92: // STA (ind)
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addr = 0x100 * READ_LOW( (uint8_t) (data + 1) );
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addr += READ_LOW( data );
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pc++;
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goto sta_ptr;
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case 0x99: // STA abs,Y
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data += y;
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case 0x8D: // STA abs
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addr = data + 0x100 * GET_MSB();
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pc += 2;
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sta_ptr:
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CPU_WRITE_FAST( this, addr, a, TIME );
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goto loop;
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}
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{
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fuint16 addr;
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case 0xA1: // LDA (ind,X)
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data = (uint8_t) (data + x);
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case 0xB2: // LDA (ind)
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addr = 0x100 * READ_LOW( (uint8_t) (data + 1) );
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addr += READ_LOW( data );
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pc++;
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goto a_nz_read_addr;
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case 0xB1:// LDA (ind),Y
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addr = READ_LOW( data ) + y;
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PAGE_CROSS_PENALTY( addr );
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addr += 0x100 * READ_LOW( (uint8_t) (data + 1) );
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pc++;
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goto a_nz_read_addr;
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case 0xB9: // LDA abs,Y
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data += y;
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PAGE_CROSS_PENALTY( data );
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case 0xAD: // LDA abs
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addr = data + 0x100 * GET_MSB();
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pc += 2;
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a_nz_read_addr:
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CPU_READ_FAST( this, addr, TIME, nz );
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a = nz;
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goto loop;
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}
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case 0xBE:{// LDX abs,y
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PAGE_CROSS_PENALTY( data + y );
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fuint16 addr = GET_ADDR() + y;
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pc += 2;
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FLUSH_TIME();
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x = nz = READ( addr );
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CACHE_TIME();
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goto loop;
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}
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case 0xB5: // LDA zp,x
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a = nz = READ_LOW( (uint8_t) (data + x) );
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pc++;
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goto loop;
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case 0xA9: // LDA #imm
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pc++;
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a = data;
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nz = data;
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goto loop;
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// Bit operations
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case 0x3C: // BIT abs,x
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data += x;
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case 0x2C:{// BIT abs
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fuint16 addr;
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ADD_PAGE( addr );
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FLUSH_TIME();
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nz = READ( addr );
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CACHE_TIME();
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goto bit_common;
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}
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case 0x34: // BIT zp,x
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data = (uint8_t) (data + x);
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case 0x24: // BIT zp
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data = READ_LOW( data );
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case 0x89: // BIT imm
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nz = data;
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bit_common:
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pc++;
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status &= ~st_v;
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status |= nz & st_v;
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if ( nz & a )
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goto loop; // Z should be clear, and nz must be non-zero if nz & a is
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nz <<= 8; // set Z flag without affecting N flag
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goto loop;
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{
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fuint16 addr;
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case 0xB3: // TST abs,x
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addr = GET_MSB() + x;
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goto tst_abs;
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case 0x93: // TST abs
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addr = GET_MSB();
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tst_abs:
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addr += 0x100 * instr [2];
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pc++;
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FLUSH_TIME();
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nz = READ( addr );
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CACHE_TIME();
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goto tst_common;
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}
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case 0xA3: // TST zp,x
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|
nz = READ_LOW( (uint8_t) (GET_MSB() + x) );
|
|
goto tst_common;
|
|
|
|
case 0x83: // TST zp
|
|
nz = READ_LOW( GET_MSB() );
|
|
tst_common:
|
|
pc += 2;
|
|
status &= ~st_v;
|
|
status |= nz & st_v;
|
|
if ( nz & data )
|
|
goto loop; // Z should be clear, and nz must be non-zero if nz & data is
|
|
nz <<= 8; // set Z flag without affecting N flag
|
|
goto loop;
|
|
|
|
{
|
|
fuint16 addr;
|
|
case 0x0C: // TSB abs
|
|
case 0x1C: // TRB abs
|
|
addr = GET_ADDR();
|
|
pc++;
|
|
goto txb_addr;
|
|
|
|
// TODO: everyone lists different behaviors for the status flags, ugh
|
|
case 0x04: // TSB zp
|
|
case 0x14: // TRB zp
|
|
addr = data + ram_addr;
|
|
txb_addr:
|
|
FLUSH_TIME();
|
|
nz = a | READ( addr );
|
|
if ( opcode & 0x10 )
|
|
nz ^= a; // bits from a will already be set, so this clears them
|
|
status &= ~st_v;
|
|
status |= nz & st_v;
|
|
pc++;
|
|
WRITE( addr, nz );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
}
|
|
|
|
case 0x07: // RMBn
|
|
case 0x17:
|
|
case 0x27:
|
|
case 0x37:
|
|
case 0x47:
|
|
case 0x57:
|
|
case 0x67:
|
|
case 0x77:
|
|
pc++;
|
|
READ_LOW( data ) &= ~(1 << (opcode >> 4));
|
|
goto loop;
|
|
|
|
case 0x87: // SMBn
|
|
case 0x97:
|
|
case 0xA7:
|
|
case 0xB7:
|
|
case 0xC7:
|
|
case 0xD7:
|
|
case 0xE7:
|
|
case 0xF7:
|
|
pc++;
|
|
READ_LOW( data ) |= 1 << ((opcode >> 4) - 8);
|
|
goto loop;
|
|
|
|
// Load/store
|
|
|
|
case 0x9E: // STZ abs,x
|
|
data += x;
|
|
case 0x9C: // STZ abs
|
|
ADD_PAGE( data );
|
|
pc++;
|
|
FLUSH_TIME();
|
|
WRITE( data, 0 );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
|
|
case 0x74: // STZ zp,x
|
|
data = (uint8_t) (data + x);
|
|
case 0x64: // STZ zp
|
|
pc++;
|
|
WRITE_LOW( data, 0 );
|
|
goto loop;
|
|
|
|
case 0x94: // STY zp,x
|
|
data = (uint8_t) (data + x);
|
|
case 0x84: // STY zp
|
|
pc++;
|
|
WRITE_LOW( data, y );
|
|
goto loop;
|
|
|
|
case 0x96: // STX zp,y
|
|
data = (uint8_t) (data + y);
|
|
case 0x86: // STX zp
|
|
pc++;
|
|
WRITE_LOW( data, x );
|
|
goto loop;
|
|
|
|
case 0xB6: // LDX zp,y
|
|
data = (uint8_t) (data + y);
|
|
case 0xA6: // LDX zp
|
|
data = READ_LOW( data );
|
|
case 0xA2: // LDX #imm
|
|
pc++;
|
|
x = data;
|
|
nz = data;
|
|
goto loop;
|
|
|
|
case 0xB4: // LDY zp,x
|
|
data = (uint8_t) (data + x);
|
|
case 0xA4: // LDY zp
|
|
data = READ_LOW( data );
|
|
case 0xA0: // LDY #imm
|
|
pc++;
|
|
y = data;
|
|
nz = data;
|
|
goto loop;
|
|
|
|
case 0xBC: // LDY abs,X
|
|
data += x;
|
|
PAGE_CROSS_PENALTY( data );
|
|
case 0xAC:{// LDY abs
|
|
fuint16 addr = data + 0x100 * GET_MSB();
|
|
pc += 2;
|
|
FLUSH_TIME();
|
|
y = nz = READ( addr );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
}
|
|
|
|
{
|
|
fuint8 temp;
|
|
case 0x8C: // STY abs
|
|
temp = y;
|
|
goto store_abs;
|
|
|
|
case 0x8E: // STX abs
|
|
temp = x;
|
|
store_abs:
|
|
{
|
|
fuint16 addr = GET_ADDR();
|
|
pc += 2;
|
|
FLUSH_TIME();
|
|
WRITE( addr, temp );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
}
|
|
}
|
|
|
|
// Compare
|
|
|
|
case 0xEC:{// CPX abs
|
|
fuint16 addr = GET_ADDR();
|
|
pc++;
|
|
FLUSH_TIME();
|
|
data = READ( addr );
|
|
CACHE_TIME();
|
|
goto cpx_data;
|
|
}
|
|
|
|
case 0xE4: // CPX zp
|
|
data = READ_LOW( data );
|
|
case 0xE0: // CPX #imm
|
|
cpx_data:
|
|
nz = x - data;
|
|
pc++;
|
|
c = ~nz;
|
|
nz &= 0xFF;
|
|
goto loop;
|
|
|
|
case 0xCC:{// CPY abs
|
|
fuint16 addr = GET_ADDR();
|
|
pc++;
|
|
FLUSH_TIME();
|
|
data = READ( addr );
|
|
CACHE_TIME();
|
|
goto cpy_data;
|
|
}
|
|
|
|
case 0xC4: // CPY zp
|
|
data = READ_LOW( data );
|
|
case 0xC0: // CPY #imm
|
|
cpy_data:
|
|
nz = y - data;
|
|
pc++;
|
|
c = ~nz;
|
|
nz &= 0xFF;
|
|
goto loop;
|
|
|
|
// Logical
|
|
|
|
#define ARITH_ADDR_MODES( op )\
|
|
case op - 0x04: /* (ind,x) */\
|
|
data = (uint8_t) (data + x);\
|
|
case op + 0x0D: /* (ind) */\
|
|
data = 0x100 * READ_LOW( (uint8_t) (data + 1) ) + READ_LOW( data );\
|
|
goto ptr##op;\
|
|
case op + 0x0C:{/* (ind),y */\
|
|
fuint16 temp = READ_LOW( data ) + y;\
|
|
PAGE_CROSS_PENALTY( temp );\
|
|
data = temp + 0x100 * READ_LOW( (uint8_t) (data + 1) );\
|
|
goto ptr##op;\
|
|
}\
|
|
case op + 0x10: /* zp,X */\
|
|
data = (uint8_t) (data + x);\
|
|
case op + 0x00: /* zp */\
|
|
data = READ_LOW( data );\
|
|
goto imm##op;\
|
|
case op + 0x14: /* abs,Y */\
|
|
data += y;\
|
|
goto ind##op;\
|
|
case op + 0x18: /* abs,X */\
|
|
data += x;\
|
|
ind##op:\
|
|
PAGE_CROSS_PENALTY( data );\
|
|
case op + 0x08: /* abs */\
|
|
ADD_PAGE( data );\
|
|
ptr##op:\
|
|
FLUSH_TIME();\
|
|
data = READ( data );\
|
|
CACHE_TIME();\
|
|
case op + 0x04: /* imm */\
|
|
imm##op:
|
|
|
|
ARITH_ADDR_MODES( 0xC5 ) // CMP
|
|
nz = a - data;
|
|
pc++;
|
|
c = ~nz;
|
|
nz &= 0xFF;
|
|
goto loop;
|
|
|
|
ARITH_ADDR_MODES( 0x25 ) // AND
|
|
nz = (a &= data);
|
|
pc++;
|
|
goto loop;
|
|
|
|
ARITH_ADDR_MODES( 0x45 ) // EOR
|
|
nz = (a ^= data);
|
|
pc++;
|
|
goto loop;
|
|
|
|
ARITH_ADDR_MODES( 0x05 ) // ORA
|
|
nz = (a |= data);
|
|
pc++;
|
|
goto loop;
|
|
|
|
// Add/subtract
|
|
|
|
ARITH_ADDR_MODES( 0xE5 ) // SBC
|
|
data ^= 0xFF;
|
|
goto adc_imm;
|
|
|
|
ARITH_ADDR_MODES( 0x65 ) // ADC
|
|
adc_imm: {
|
|
if ( status & st_d ) {
|
|
dprintf( "Decimal mode not supported\n" );
|
|
}
|
|
fint16 carry = c >> 8 & 1;
|
|
fint16 ov = (a ^ 0x80) + carry + (int8_t) data; // sign-extend
|
|
status &= ~st_v;
|
|
status |= ov >> 2 & 0x40;
|
|
c = nz = a + data + carry;
|
|
pc++;
|
|
a = (uint8_t) nz;
|
|
goto loop;
|
|
}
|
|
|
|
// Shift/rotate
|
|
|
|
case 0x4A: // LSR A
|
|
c = 0;
|
|
case 0x6A: // ROR A
|
|
nz = c >> 1 & 0x80;
|
|
c = a << 8;
|
|
nz |= a >> 1;
|
|
a = nz;
|
|
goto loop;
|
|
|
|
case 0x0A: // ASL A
|
|
nz = a << 1;
|
|
c = nz;
|
|
a = (uint8_t) nz;
|
|
goto loop;
|
|
|
|
case 0x2A: { // ROL A
|
|
nz = a << 1;
|
|
fint16 temp = c >> 8 & 1;
|
|
c = nz;
|
|
nz |= temp;
|
|
a = (uint8_t) nz;
|
|
goto loop;
|
|
}
|
|
|
|
case 0x5E: // LSR abs,X
|
|
data += x;
|
|
case 0x4E: // LSR abs
|
|
c = 0;
|
|
case 0x6E: // ROR abs
|
|
ror_abs: {
|
|
ADD_PAGE( data );
|
|
FLUSH_TIME();
|
|
int temp = READ( data );
|
|
nz = (c >> 1 & 0x80) | (temp >> 1);
|
|
c = temp << 8;
|
|
goto rotate_common;
|
|
}
|
|
|
|
case 0x3E: // ROL abs,X
|
|
data += x;
|
|
goto rol_abs;
|
|
|
|
case 0x1E: // ASL abs,X
|
|
data += x;
|
|
case 0x0E: // ASL abs
|
|
c = 0;
|
|
case 0x2E: // ROL abs
|
|
rol_abs:
|
|
ADD_PAGE( data );
|
|
nz = c >> 8 & 1;
|
|
FLUSH_TIME();
|
|
nz |= (c = READ( data ) << 1);
|
|
rotate_common:
|
|
pc++;
|
|
WRITE( data, (uint8_t) nz );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
|
|
case 0x7E: // ROR abs,X
|
|
data += x;
|
|
goto ror_abs;
|
|
|
|
case 0x76: // ROR zp,x
|
|
data = (uint8_t) (data + x);
|
|
goto ror_zp;
|
|
|
|
case 0x56: // LSR zp,x
|
|
data = (uint8_t) (data + x);
|
|
case 0x46: // LSR zp
|
|
c = 0;
|
|
case 0x66: // ROR zp
|
|
ror_zp: {
|
|
int temp = READ_LOW( data );
|
|
nz = (c >> 1 & 0x80) | (temp >> 1);
|
|
c = temp << 8;
|
|
goto write_nz_zp;
|
|
}
|
|
|
|
case 0x36: // ROL zp,x
|
|
data = (uint8_t) (data + x);
|
|
goto rol_zp;
|
|
|
|
case 0x16: // ASL zp,x
|
|
data = (uint8_t) (data + x);
|
|
case 0x06: // ASL zp
|
|
c = 0;
|
|
case 0x26: // ROL zp
|
|
rol_zp:
|
|
nz = c >> 8 & 1;
|
|
nz |= (c = READ_LOW( data ) << 1);
|
|
goto write_nz_zp;
|
|
|
|
// Increment/decrement
|
|
|
|
#define INC_DEC_AXY( reg, n ) reg = (uint8_t) (nz = reg + n); goto loop;
|
|
|
|
case 0x1A: // INA
|
|
INC_DEC_AXY( a, +1 )
|
|
|
|
case 0xE8: // INX
|
|
INC_DEC_AXY( x, +1 )
|
|
|
|
case 0xC8: // INY
|
|
INC_DEC_AXY( y, +1 )
|
|
|
|
case 0x3A: // DEA
|
|
INC_DEC_AXY( a, -1 )
|
|
|
|
case 0xCA: // DEX
|
|
INC_DEC_AXY( x, -1 )
|
|
|
|
case 0x88: // DEY
|
|
INC_DEC_AXY( y, -1 )
|
|
|
|
case 0xF6: // INC zp,x
|
|
data = (uint8_t) (data + x);
|
|
case 0xE6: // INC zp
|
|
nz = 1;
|
|
goto add_nz_zp;
|
|
|
|
case 0xD6: // DEC zp,x
|
|
data = (uint8_t) (data + x);
|
|
case 0xC6: // DEC zp
|
|
nz = (unsigned) -1;
|
|
add_nz_zp:
|
|
nz += READ_LOW( data );
|
|
write_nz_zp:
|
|
pc++;
|
|
WRITE_LOW( data, nz );
|
|
goto loop;
|
|
|
|
case 0xFE: // INC abs,x
|
|
data = x + GET_ADDR();
|
|
goto inc_ptr;
|
|
|
|
case 0xEE: // INC abs
|
|
data = GET_ADDR();
|
|
inc_ptr:
|
|
nz = 1;
|
|
goto inc_common;
|
|
|
|
case 0xDE: // DEC abs,x
|
|
data = x + GET_ADDR();
|
|
goto dec_ptr;
|
|
|
|
case 0xCE: // DEC abs
|
|
data = GET_ADDR();
|
|
dec_ptr:
|
|
nz = (unsigned) -1;
|
|
inc_common:
|
|
FLUSH_TIME();
|
|
nz += READ( data );
|
|
pc += 2;
|
|
WRITE( data, (uint8_t) nz );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
|
|
// Transfer
|
|
|
|
case 0xA8: // TAY
|
|
y = a;
|
|
nz = a;
|
|
goto loop;
|
|
|
|
case 0x98: // TYA
|
|
a = y;
|
|
nz = y;
|
|
goto loop;
|
|
|
|
case 0xAA: // TAX
|
|
x = a;
|
|
nz = a;
|
|
goto loop;
|
|
|
|
case 0x8A: // TXA
|
|
a = x;
|
|
nz = x;
|
|
goto loop;
|
|
|
|
case 0x9A: // TXS
|
|
SET_SP( x ); // verified (no flag change)
|
|
goto loop;
|
|
|
|
case 0xBA: // TSX
|
|
x = nz = GET_SP();
|
|
goto loop;
|
|
|
|
#define SWAP_REGS( r1, r2 ) {\
|
|
fuint8 t = r1;\
|
|
r1 = r2;\
|
|
r2 = t;\
|
|
goto loop;\
|
|
}
|
|
|
|
case 0x02: // SXY
|
|
SWAP_REGS( x, y );
|
|
|
|
case 0x22: // SAX
|
|
SWAP_REGS( a, x );
|
|
|
|
case 0x42: // SAY
|
|
SWAP_REGS( a, y );
|
|
|
|
case 0x62: // CLA
|
|
a = 0;
|
|
goto loop;
|
|
|
|
case 0x82: // CLX
|
|
x = 0;
|
|
goto loop;
|
|
|
|
case 0xC2: // CLY
|
|
y = 0;
|
|
goto loop;
|
|
|
|
// Stack
|
|
|
|
case 0x48: // PHA
|
|
PUSH( a );
|
|
goto loop;
|
|
|
|
case 0xDA: // PHX
|
|
PUSH( x );
|
|
goto loop;
|
|
|
|
case 0x5A: // PHY
|
|
PUSH( y );
|
|
goto loop;
|
|
|
|
case 0x40:{// RTI
|
|
fuint8 temp = READ_LOW( sp );
|
|
pc = READ_LOW( 0x100 | (sp - 0xFF) );
|
|
pc |= READ_LOW( 0x100 | (sp - 0xFE) ) * 0x100;
|
|
sp = (sp - 0xFD) | 0x100;
|
|
data = status;
|
|
SET_STATUS( temp );
|
|
r->status = status; // update externally-visible I flag
|
|
if ( (data ^ status) & st_i )
|
|
{
|
|
hes_time_t new_time = cpu->end_time;
|
|
if ( !(status & st_i) && new_time > cpu->irq_time )
|
|
new_time = cpu->irq_time;
|
|
blargg_long delta = s.base - new_time;
|
|
s.base = new_time;
|
|
s_time += delta;
|
|
}
|
|
goto loop;
|
|
}
|
|
|
|
#define POP() READ_LOW( sp ); sp = (sp - 0xFF) | 0x100
|
|
|
|
case 0x68: // PLA
|
|
a = nz = POP();
|
|
goto loop;
|
|
|
|
case 0xFA: // PLX
|
|
x = nz = POP();
|
|
goto loop;
|
|
|
|
case 0x7A: // PLY
|
|
y = nz = POP();
|
|
goto loop;
|
|
|
|
case 0x28:{// PLP
|
|
fuint8 temp = POP();
|
|
fuint8 changed = status ^ temp;
|
|
SET_STATUS( temp );
|
|
if ( !(changed & st_i) )
|
|
goto loop; // I flag didn't change
|
|
if ( status & st_i )
|
|
goto handle_sei;
|
|
goto handle_cli;
|
|
}
|
|
#undef POP
|
|
|
|
case 0x08: { // PHP
|
|
fuint8 temp;
|
|
CALC_STATUS( temp );
|
|
PUSH( temp | st_b );
|
|
goto loop;
|
|
}
|
|
|
|
// Flags
|
|
|
|
case 0x38: // SEC
|
|
c = (unsigned) ~0;
|
|
goto loop;
|
|
|
|
case 0x18: // CLC
|
|
c = 0;
|
|
goto loop;
|
|
|
|
case 0xB8: // CLV
|
|
status &= ~st_v;
|
|
goto loop;
|
|
|
|
case 0xD8: // CLD
|
|
status &= ~st_d;
|
|
goto loop;
|
|
|
|
case 0xF8: // SED
|
|
status |= st_d;
|
|
goto loop;
|
|
|
|
case 0x58: // CLI
|
|
if ( !(status & st_i) )
|
|
goto loop;
|
|
status &= ~st_i;
|
|
handle_cli: {
|
|
r->status = status; // update externally-visible I flag
|
|
blargg_long delta = s.base - cpu->irq_time;
|
|
if ( delta <= 0 )
|
|
{
|
|
if ( TIME < cpu->irq_time )
|
|
goto loop;
|
|
goto delayed_cli;
|
|
}
|
|
s.base = cpu->irq_time;
|
|
s_time += delta;
|
|
if ( s_time < 0 )
|
|
goto loop;
|
|
|
|
if ( delta >= s_time + 1 )
|
|
{
|
|
// delayed irq until after next instruction
|
|
s.base += s_time + 1;
|
|
s_time = -1;
|
|
cpu->irq_time = s.base; // TODO: remove, as only to satisfy debug check in loop
|
|
goto loop;
|
|
}
|
|
delayed_cli:
|
|
dprintf( "Delayed CLI not supported\n" ); // TODO: implement
|
|
goto loop;
|
|
}
|
|
|
|
case 0x78: // SEI
|
|
if ( status & st_i )
|
|
goto loop;
|
|
status |= st_i;
|
|
handle_sei: {
|
|
r->status = status; // update externally-visible I flag
|
|
blargg_long delta = s.base - cpu->end_time;
|
|
s.base = cpu->end_time;
|
|
s_time += delta;
|
|
if ( s_time < 0 )
|
|
goto loop;
|
|
dprintf( "Delayed SEI not supported\n" ); // TODO: implement
|
|
goto loop;
|
|
}
|
|
|
|
// Special
|
|
|
|
case 0x53:{// TAM
|
|
fuint8 const bits = data; // avoid using data across function call
|
|
pc++;
|
|
int i;
|
|
for ( i = 0; i < 8; i++ )
|
|
if ( bits & (1 << i) )
|
|
/* this->cpu.set_mmr( i, a ); */
|
|
Cpu_set_mmr( this, i, a );
|
|
goto loop;
|
|
}
|
|
|
|
case 0x43:{// TMA
|
|
pc++;
|
|
byte const* in = cpu->mmr;
|
|
do
|
|
{
|
|
if ( data & 1 )
|
|
a = *in;
|
|
in++;
|
|
}
|
|
while ( (data >>= 1) != 0 );
|
|
goto loop;
|
|
}
|
|
|
|
case 0x03: // ST0
|
|
case 0x13: // ST1
|
|
case 0x23:{// ST2
|
|
fuint16 addr = opcode >> 4;
|
|
if ( addr )
|
|
addr++;
|
|
pc++;
|
|
FLUSH_TIME();
|
|
CPU_WRITE_VDP( this, addr, data, TIME );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
}
|
|
|
|
case 0xEA: // NOP
|
|
goto loop;
|
|
|
|
case 0x54: // CSL
|
|
dprintf( "CSL not supported\n" );
|
|
illegal_encountered = true;
|
|
goto loop;
|
|
|
|
case 0xD4: // CSH
|
|
goto loop;
|
|
|
|
case 0xF4: { // SET
|
|
//fuint16 operand = GET_MSB();
|
|
dprintf( "SET not handled\n" );
|
|
//switch ( data )
|
|
//{
|
|
//}
|
|
illegal_encountered = true;
|
|
goto loop;
|
|
}
|
|
|
|
// Block transfer
|
|
|
|
{
|
|
fuint16 in_alt;
|
|
fint16 in_inc;
|
|
fuint16 out_alt;
|
|
fint16 out_inc;
|
|
|
|
case 0xE3: // TIA
|
|
in_alt = 0;
|
|
goto bxfer_alt;
|
|
|
|
case 0xF3: // TAI
|
|
in_alt = 1;
|
|
bxfer_alt:
|
|
in_inc = in_alt ^ 1;
|
|
out_alt = in_inc;
|
|
out_inc = in_alt;
|
|
goto bxfer;
|
|
|
|
case 0xD3: // TIN
|
|
in_inc = 1;
|
|
out_inc = 0;
|
|
goto bxfer_no_alt;
|
|
|
|
case 0xC3: // TDD
|
|
in_inc = -1;
|
|
out_inc = -1;
|
|
goto bxfer_no_alt;
|
|
|
|
case 0x73: // TII
|
|
in_inc = 1;
|
|
out_inc = 1;
|
|
bxfer_no_alt:
|
|
in_alt = 0;
|
|
out_alt = 0;
|
|
bxfer: {
|
|
fuint16 in = GET_LE16( instr + 0 );
|
|
fuint16 out = GET_LE16( instr + 2 );
|
|
int count = GET_LE16( instr + 4 );
|
|
if ( !count )
|
|
count = 0x10000;
|
|
pc += 6;
|
|
WRITE_LOW( 0x100 | (sp - 1), y );
|
|
WRITE_LOW( 0x100 | (sp - 2), a );
|
|
WRITE_LOW( 0x100 | (sp - 3), x );
|
|
FLUSH_TIME();
|
|
do
|
|
{
|
|
// TODO: reads from $0800-$1400 in I/O page return 0 and don't access I/O
|
|
fuint8 t = READ( in );
|
|
in += in_inc;
|
|
in &= 0xFFFF;
|
|
s.time += 6;
|
|
if ( in_alt )
|
|
in_inc = -in_inc;
|
|
WRITE( out, t );
|
|
out += out_inc;
|
|
out &= 0xFFFF;
|
|
if ( out_alt )
|
|
out_inc = -out_inc;
|
|
}
|
|
while ( --count );
|
|
CACHE_TIME();
|
|
goto loop;
|
|
}
|
|
}
|
|
|
|
// Illegal
|
|
|
|
default:
|
|
assert( (unsigned) opcode <= 0xFF );
|
|
dprintf( "Illegal opcode $%02X at $%04X\n", (int) opcode, (int) pc - 1 );
|
|
illegal_encountered = true;
|
|
goto loop;
|
|
}
|
|
assert( false );
|
|
|
|
int result_;
|
|
handle_brk:
|
|
pc++;
|
|
result_ = 6;
|
|
|
|
interrupt:
|
|
{
|
|
s_time += 7;
|
|
|
|
WRITE_LOW( 0x100 | (sp - 1), pc >> 8 );
|
|
WRITE_LOW( 0x100 | (sp - 2), pc );
|
|
pc = GET_LE16( &READ_PROG( 0xFFF0 ) + result_ );
|
|
|
|
sp = (sp - 3) | 0x100;
|
|
fuint8 temp;
|
|
CALC_STATUS( temp );
|
|
if ( result_ == 6 )
|
|
temp |= st_b;
|
|
WRITE_LOW( sp, temp );
|
|
|
|
status &= ~st_d;
|
|
status |= st_i;
|
|
r->status = status; // update externally-visible I flag
|
|
|
|
blargg_long delta = s.base - cpu->end_time;
|
|
s.base = cpu->end_time;
|
|
s_time += delta;
|
|
goto loop;
|
|
}
|
|
|
|
idle_done:
|
|
s_time = 0;
|
|
out_of_time:
|
|
pc--;
|
|
FLUSH_TIME();
|
|
CPU_DONE( this, TIME, result_ );
|
|
CACHE_TIME();
|
|
if ( result_ > 0 )
|
|
goto interrupt;
|
|
if ( s_time < 0 )
|
|
goto loop;
|
|
|
|
s.time = s_time;
|
|
|
|
r->pc = pc;
|
|
r->sp = GET_SP();
|
|
r->a = a;
|
|
r->x = x;
|
|
r->y = y;
|
|
|
|
{
|
|
fuint8 temp;
|
|
CALC_STATUS( temp );
|
|
r->status = temp;
|
|
}
|
|
|
|
cpu->state_ = s;
|
|
cpu->state = &cpu->state_;
|
|
|
|
return illegal_encountered;
|
|
}
|
|
|