173 lines
4.2 KiB
C
173 lines
4.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2014 by Cástor Muñoz
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdint.h>
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#include <stdbool.h>
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#include "config.h"
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#include "system.h"
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#include "s5l8700.h"
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#include "uc870x.h"
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/*
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* s5l8701 UC870X HW: 3 UARTC, 1 port per UARTC
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*/
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static struct uartc_port *uartc0_port_l[UARTC0_N_PORTS];
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const struct uartc s5l8701_uartc0 =
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{
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.id = 0,
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.baddr = UARTC0_BASE_ADDR,
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.port_off = UARTC0_PORT_OFFSET,
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.n_ports = UARTC0_N_PORTS,
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.port_l = uartc0_port_l,
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};
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/* UARTC1,2 not used on Nano2G */
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#ifndef IPOD_NANO2G
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static struct uartc_port *uartc1_port_l[UARTC1_N_PORTS];
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const struct uartc s5l8701_uartc1 =
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{
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.id = 1,
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.baddr = UARTC1_BASE_ADDR,
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.port_off = UARTC1_PORT_OFFSET,
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.n_ports = UARTC1_N_PORTS,
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.port_l = uartc1_port_l,
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};
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static struct uartc_port *uartc2_port_l[UARTC2_N_PORTS];
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const struct uartc s5l8701_uartc2 =
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{
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.id = 2,
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.baddr = UARTC2_BASE_ADDR,
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.port_off = UARTC2_PORT_OFFSET,
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.n_ports = UARTC2_N_PORTS,
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.port_l = uartc2_port_l,
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};
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#endif
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static uint8_t clockgate_uartc[S5L8701_N_UARTC] = {
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CLOCKGATE_UARTC0, CLOCKGATE_UARTC1, CLOCKGATE_UARTC2 };
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static int intmsk_uart[S5L8701_N_UARTC] = {
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INTMSK_EINTG0, INTMSK_UART1, INTMSK_UART2 };
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/*
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* Device level functions specific to S5L8701
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*/
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void uart_target_enable_gpio(int uart_id, int port_id)
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{
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(void) port_id;
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switch (uart_id) {
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/* configure UARTx Tx/Rx GPIO ports */
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case 0:
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PCON1 = (PCON1 & 0xffffff00) | 0x00000044;
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break;
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case 1:
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case 2:
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/* unknown */
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default:
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break;
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}
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}
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void uart_target_disable_gpio(int uart_id, int port_id)
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{
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(void) port_id;
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switch (uart_id) {
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/* configure minimal power consumption */
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case 0:
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PCON1 = (PCON1 & 0xffffff00) | 0x00000011;
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break;
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case 1:
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case 2:
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default:
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break;
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}
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}
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void uart_target_enable_irq(int uart_id, int port_id)
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{
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(void) port_id;
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if (uart_id == 0) GPIOIC_INTEN(0) = 0x200;
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INTMSK |= intmsk_uart[uart_id];
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}
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void uart_target_disable_irq(int uart_id, int port_id)
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{
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(void) port_id;
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INTMSK &= ~intmsk_uart[uart_id];
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if (uart_id == 0) GPIOIC_INTEN(0) = 0;
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}
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void uart_target_clear_irq(int uart_id, int port_id)
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{
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(void) port_id;
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if (uart_id == 0) GPIOIC_INTSTAT(0) = 0x200;
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SRCPND |= intmsk_uart[uart_id];
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}
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void uart_target_enable_clocks(int uart_id)
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{
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PWRCON &= ~(1 << clockgate_uartc[uart_id]);
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}
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void uart_target_disable_clocks(int uart_id)
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{
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PWRCON |= (1 << clockgate_uartc[uart_id]);
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}
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/*
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* ISRs
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*/
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/* On Nano2G, PORT0 interrupts are not used when iAP is disabled */
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#if !defined(IPOD_NANO2G) || defined(IPOD_ACCESSORY_PROTOCOL)
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/*
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* UART0 IRQ is connected to EINTG0, this is a quick patch, a "real"
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* EINT handler will be needed if in future we use more than one IRQ
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* on this group.
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*/
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void ICODE_ATTR EINT_G0(void)
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{
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GPIOIC_INTSTAT(0) = 0x200; /* clear external IRQ */
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uartc_callback(&s5l8701_uartc0, 0);
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}
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#endif
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/* UARTC1,2 not used on Nano2G */
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#ifndef IPOD_NANO2G
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void ICODE_ATTR INT_UART1(void)
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{
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uartc_callback(&s5l8701_uartc1, 0);
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}
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void ICODE_ATTR INT_UART2(void)
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{
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uartc_callback(&s5l8701_uartc2, 0);
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}
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#endif
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/* Main init */
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void uart_init(void)
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{
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uartc_open(&s5l8701_uartc0);
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}
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