63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 Marcin Bukat
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 1
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "thread.h"
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#include "adc.h"
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unsigned short adc_read(int channel)
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{
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unsigned short result;
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/* ungate lsadc clocks */
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SCU_CLKCFG &= ~(CLKCFG_LSADC|CLKCFG_PCLK_LSADC);
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/* wait a bit for clock to stabilize */
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udelay(10);
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ADC_CTRL = (1<<4)|(1<<3) | (channel & (NUM_ADC_CHANNELS - 1));
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/* Wait for conversion ready.
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* The doc says one should pool ADC_STAT for end of conversion
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* or setup interrupt. Neither of these two methods work as
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* advertised.
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*
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* ~10us should be enough so we wait 20us to be on the safe side
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*/
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udelay(20);
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/* 10bits result */
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result = (ADC_DATA & 0x3ff);
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/* turn off lsadc clock when not in use */
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SCU_CLKCFG |= (CLKCFG_LSADC|CLKCFG_PCLK_LSADC);
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return result;
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}
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void adc_init(void)
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{
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/* ADC clock divider to reach max 1MHz */
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SCU_DIVCON1 = (SCU_DIVCON1 & ~(0xff<<10)) | (49<<10);
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}
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