Amaury Pouly
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0d78dd170d
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imx233: user __FIELD_SET to set the clock divisors
The clock divisors must *NEVER* be 0, first clearing then setting is thus undefined.
Change-Id: Iba8e6ba1e668bf746e3f7387f0175f63d81f6b2b
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2012-02-28 23:57:37 +01:00 |
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Amaury Pouly
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eaa83bd647
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imx233: fix clkctrl code (some registers don't have a SET/CLR variant)
Change-Id: I3ce6a77cdc5ea89e1e43bc00c9ec43664e765fdc
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2012-01-21 20:15:29 +01:00 |
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Amaury Pouly
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39148be8ac
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imx233: fix to typo and remove a forgotten panic
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31269 a1c6a512-1295-4272-9138-f99709370657
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2011-12-15 17:07:15 +00:00 |
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Amaury Pouly
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dd865bcd1e
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imx233: add control for more clocks, add debug clock debug screen
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31121 a1c6a512-1295-4272-9138-f99709370657
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2011-12-03 15:34:40 +00:00 |
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Amaury Pouly
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d0e8c35862
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imx233/fuze+: move to a more generic xtal derived clock enabling function, fix timrot accordingly
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30793 a1c6a512-1295-4272-9138-f99709370657
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2011-10-18 22:00:50 +00:00 |
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Amaury Pouly
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b25d6e0c96
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imx233/fuze+: implement usb enable
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30542 a1c6a512-1295-4272-9138-f99709370657
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2011-09-14 11:50:06 +00:00 |
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Amaury Pouly
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617d1e9f6b
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imx233/fuze+: ssp, dma, mmc now work properly, partially implement cpu frequency changing, implement panic waiting
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30104 a1c6a512-1295-4272-9138-f99709370657
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2011-06-30 17:31:40 +00:00 |
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Amaury Pouly
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2cf3313382
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fuze+: add more clocking code, add dma code, add ssp code, add stub usb code, update storage to SD + MMC, beginning of the driver
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30010 a1c6a512-1295-4272-9138-f99709370657
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2011-06-17 22:30:58 +00:00 |
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Amaury Pouly
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08fb3f6574
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Sansa Fuze+: initial commit (bootloader only, LCD basically working)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29808 a1c6a512-1295-4272-9138-f99709370657
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2011-05-01 13:02:46 +00:00 |
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