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11 commits

Author SHA1 Message Date
Jonathan Gordon
bdf4d3927c Hopefully fix all the errors/warnings 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14764 a1c6a512-1295-4272-9138-f99709370657
 2007-09-20 08:01:56 +00:00
Karl Kurbjun
7b97fe21c0 Beginning of an M:Robe 500i port. Currently only in the bootloader stage. Needs another piece of code to start the boot process - will be in the wiki. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14763 a1c6a512-1295-4272-9138-f99709370657
 2007-09-20 04:46:41 +00:00
Barry Wardell
2fc19497fc PP502x: Clock setup cleanup. 
* Prepare sleep mode by adding CPUFREQ_SLEEP, as was done previsouly with PP5002. This is already confirmed working on PP5020 (H10), PP5022 (mini2g) and PP5024 (Sansa), but a lot of functions in rockbox will probably hang because the microsecond timer isn't running in this mode.
* Simplify set_cpu_frequency() somewhat to make it more like the PP5002 version.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14106 a1c6a512-1295-4272-9138-f99709370657
 2007-07-31 20:48:49 +00:00
Jens Arnold
1bc3b7feb2 PP5002: Clock setup cleanup. * Switch to 80MHz when boosted like on the other PP targets. * Prepare sleep mode by adding CPUFREQ_SLEEP. This is already confirmed working, but a lot of functions in rockbox will probably hang because the microsecond timer isn't running in this mode. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14096 a1c6a512-1295-4272-9138-f99709370657
 2007-07-31 10:56:50 +00:00
Jens Arnold
8d3ac97aff Clean up PP502x CPU clock setup code and use the full 80MHz when boosted. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14004 a1c6a512-1295-4272-9138-f99709370657
 2007-07-26 15:07:16 +00:00
Dave Chapman
ebc076bc15 Remove the hack which read the ipod hardware revision from flash in the bootloader and passed it to Rockbox via a fixed address in SDRAM. Rockbox now remaps flash and so can just read the value itself. Also clean up the debug menu a little - only display the hw revision for ipods, and add the lcd_type variable to indicate the type of LCD (0 or 1) for ipod Color/Photo. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13986 a1c6a512-1295-4272-9138-f99709370657
 2007-07-25 13:12:38 +00:00
Jens Arnold
fe23dc8f15 Improved CPU clock setup for PP502x. PP5020 and PP5022 are not register compatible here, so define the PP5022 targets properly, and introduce a CPU_PP502x macro for easier family check. Improves stability on PP5020 (less freezing, tested with Mini G1) and reduces clock change penalty (500us on PP5020; uses the relock bit on PP5022). 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13763 a1c6a512-1295-4272-9138-f99709370657
 2007-07-02 05:16:40 +00:00
Michael Sevakis
d803cf5e4e Heh. Better way to load the PROCESSOR_ID address. Thanks Thom. :) 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13156 a1c6a512-1295-4272-9138-f99709370657
 2007-04-14 11:46:05 +00:00
Michael Sevakis
036168cbf9 PP5020/PP5024: Add ASM optimized inline current_core. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13155 a1c6a512-1295-4272-9138-f99709370657
 2007-04-14 11:15:43 +00:00
Michael Sevakis
20c6bf50fe Do the target shuffle again a better way by including from higher levels 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13151 a1c6a512-1295-4272-9138-f99709370657
 2007-04-14 01:18:06 +00:00
Michael Sevakis
d95c39072a Portal Player: Add invalidate_icache and flush_icache. Flush the cache on the core for newborn threads. In doing so, move more ARM stuff to the target tree and organize it to make a clean job of it. If anything isn't appropriate for some particular device give a hollar or even just fix it by some added #ifdefing. I was informed that the PP targets are register compatible so I'm going off that advice. The Sansa likes it though. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13144 a1c6a512-1295-4272-9138-f99709370657
 2007-04-13 20:55:48 +00:00