Commit graph

6 commits

Author SHA1 Message Date
Andrew Ryabinin
8618f2c227 rk27xx: sd: properly align buffer used for DMA transfers.
Commit 7d1a47cf ("Rewrite filesystem code (WIP)") exposed
bug in rk27xx sd driver. Buffer passed to sd_read/write_sectors()
doesn't has to be cacheline aligned. DMA transfers on
unaligned buffers is quiet dangerous thing.
Make sure that the buffer is aligned to cacheline size,
If not use a temporary aligned buffer for DMA transfer.

Change-Id: I91420f2b8d58159c80c3f15f4b35e88ea0dfd14c
2014-11-29 21:00:11 +03:00
Marcin Bukat
722e24a76a rk27xx: implement frequency scalling
Implemented scheme:
        ARM AHB APB
Normal   50  50  50 MHz
Max     200 100  50 MHz

Frequency scaling is disabled on rk27generic due to too
slow lcd updates when running with 50MHz AHB.

battery_bench shows ~1h runtime improvement on hifiman.

Change-Id: I2c6f8acf6d4570c4e14f5bcc72280b51ce13c408
2012-08-30 13:50:36 +02:00
Andrew Ryabinin
40786042df rk27xx: Fix cache broken in r31339. Remove deprecated aliases.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31537 a1c6a512-1295-4272-9138-f99709370657
2012-01-03 15:01:16 +00:00
Marcin Bukat
7936649919 rk27xx - disable core_sleep() as it simply hangs when cache is enabled for unknown reason.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30452 a1c6a512-1295-4272-9138-f99709370657
2011-09-06 12:39:13 +00:00
Marcin Bukat
5d9b230168 rk27xx - implement cache_commit_discard(). Cache is still not enabled in crt0.S
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30167 a1c6a512-1295-4272-9138-f99709370657
2011-07-19 06:49:03 +00:00
Marcin Bukat
976a1699da Rockchip rk27xx port initial commit. This is still work in progress.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29935 a1c6a512-1295-4272-9138-f99709370657
2011-05-30 21:10:37 +00:00