Commit graph

4 commits

Author SHA1 Message Date
Rafaël Carré
ed13fd6dca Sansa AMS: VIC_INT_ENABLE register is not a mask
When read it returns all enabled interrupt sources
When written it enables interrupt sources for each bit set
So just like VIC_INT_EN_CLEAR, we don't have to read the previous value
before writing to it (VIC_INT_EN_CLEAR is write-only anyway)

Thanks to Fred Bauer for spotting

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23734 a1c6a512-1295-4272-9138-f99709370657
2009-11-24 12:05:53 +00:00
Rafaël Carré
c5dedd7d76 Remove the TIMER_* macros and declare target-specific functions in timer.h
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21559 a1c6a512-1295-4272-9138-f99709370657
2009-06-29 14:29:57 +00:00
Rafaël Carré
e0640c3c4b Rename TIMER_REGISTER macro to TIMER_START and TIMER_UNREGISTER to TIMER_STOP to reflect what they does exactly.
registering and unregistering are handled by the non target-specific functions of timer.c
Remove arguments from the new TIMER_START since they are unused by targets

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21553 a1c6a512-1295-4272-9138-f99709370657
2009-06-29 14:28:56 +00:00
Rafaël Carré
15e40dd3a6 Move Sansa AMS timer code in the target tree
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21552 a1c6a512-1295-4272-9138-f99709370657
2009-06-29 14:28:49 +00:00