Michael Sevakis
|
d803cf5e4e
|
Heh. Better way to load the PROCESSOR_ID address. Thanks Thom. :)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13156 a1c6a512-1295-4272-9138-f99709370657
|
2007-04-14 11:46:05 +00:00 |
|
Michael Sevakis
|
036168cbf9
|
PP5020/PP5024: Add ASM optimized inline current_core.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13155 a1c6a512-1295-4272-9138-f99709370657
|
2007-04-14 11:15:43 +00:00 |
|
Michael Sevakis
|
20c6bf50fe
|
Do the target shuffle again a better way by including from higher levels
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13151 a1c6a512-1295-4272-9138-f99709370657
|
2007-04-14 01:18:06 +00:00 |
|
Michael Sevakis
|
d95c39072a
|
Portal Player: Add invalidate_icache and flush_icache. Flush the cache on the core for newborn threads. In doing so, move more ARM stuff to the target tree and organize it to make a clean job of it. If anything isn't appropriate for some particular device give a hollar or even just fix it by some added #ifdefing. I was informed that the PP targets are register compatible so I'm going off that advice. The Sansa likes it though.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13144 a1c6a512-1295-4272-9138-f99709370657
|
2007-04-13 20:55:48 +00:00 |
|