Uses register polling method to decide when it's time to decode
RDS packets.
Change-Id: I1d3cc995ea3350ec7b101438b8f2027130d4a4c9
Reviewed-on: http://gerrit.rockbox.org/320
Reviewed-by: Lorenzo Miori <memorys60@gmail.com>
Tested-by: Lorenzo Miori <memorys60@gmail.com>
Reviewed-by: Thomas Martitz <kugel@rockbox.org>
Tested-by: Thomas Martitz <kugel@rockbox.org>
Make set_sleep_timer a static function and only call
set_sleeptimer_duration externally, which is always called with minutes
values.
Change-Id: I985308bf014e354f91c47a0b2bf62f4f5a591919
Reviewed-on: http://gerrit.rockbox.org/327
Reviewed-by: Jonathan Gordon <rockbox@jdgordon.info>
Previously TIMEOUT_BLOCK would be handled the same as TIMEOUT_NOBLOCK, i.e.
poll only without thread switch, which is rather unexpected from *_w_tmo()
functions. No current code doesn't call it that way yet.
Change-Id: I370ce0f752681122d197eadeee9ab17112647c20
We should cast to (volatile uint32_t*) here, because attempt to refer to volatile
object through use of an lvalue with non-volatile-qualified type will result in
undefined behavior.
Change-Id: I1b2e9688af11d3dcba518a5e31865d703b54b635
Use DMA engine for fullscreen updates and bypass mode for partial
updates. This gives major boost on rk27generic:
default ARM:AHB:APB 200💯50
HEAD 1/1: 26.3fps 1/4: 105.0fps
patched 1/1: 116.5fps 1/4: 249.5fps
with freq scalling NORMAL mode ARM:AHB:APB 50:50:50
HEAD 1/1: 13.1fps 1/4: 52.5fps
patched 1/1: 54.5fps 1/4: 119.0fps
Tested on rk27generic noname DAP and on Hifimans.
Change-Id: Id9dd4d2d61542c7ea6b5c6336b170d6357cefde9
This version resembles how OF handle cache invalidates.
This seems to fix mysterious data aborts on plugin/codec loading
after introducing frequency scaling.
Credit goes to mortalis for pinpointing the reason of aborts.
Change-Id: I3477b3f65d593d7b43c36a0b06d863f71f000812
The functions document my reverse engineer findings about nand
controller. This code is commented out and is purely for reference
as FTL scheme is still unknown.
Change-Id: I70edeb4bfb0cbd51b6adc15afa7193dd8f71e8da
Frequency scaling seems to be unstable and causes the device to
freeze. It is unclear why at the moment, perhaps we need to ramp
up the vddd voltage to avoid a false brownout ?
Change-Id: I7aaea9d7c213922a65250fe50775fb785d430226
This does not scale the EMI frequency and keep the processor
betweel 261MHz and 454MHz. It can still be improve. The auto-slow
divisor could still be change, 8 seems reasonable for now
Change-Id: I639bb3f6b7f8efedc7dc58d08127849156eeb1b6
Implemented scheme:
ARM AHB APB
Normal 50 50 50 MHz
Max 200 100 50 MHz
Frequency scaling is disabled on rk27generic due to too
slow lcd updates when running with 50MHz AHB.
battery_bench shows ~1h runtime improvement on hifiman.
Change-Id: I2c6f8acf6d4570c4e14f5bcc72280b51ce13c408
Remove the old debug stuff about VDDx and add a clean api to
get/set the regulator (VDDD, VDDA, VDDIO, VDDMEM). This is useful
for proper frequency scaling.
Change-Id: Ia5a1a712fd66652a8ad9601ed00db31aba5a7561
Due to the way Archos devices (i.e. the only HWCODEC devices) boot,
memory is tight these days. Disabling LOGFDISK on them will make them
work for now. In the long term a better solution is needed.
Change-Id: Ifc6bb97a81cc33545294e319bbc0a6c499788d39
Implement cache aligned transfer of more than one sectors. The
current code now transfers almost all data at once by moving
it within the buffer to make it cache aligned. This greatly
improves the performance of the transfers, especially in mass
storage mode.
Change-Id: Ic6e78773302f368426209f6fd6099089ea34cb16
Further merge drivers by using the same command and data functions.
No use one mutex per drive instead of a global sd lock. Fix the
RCA handling which was different between SD and MMC (shifted 16)
and thus confusing. Add MMC commands definition to the mmc.h
header similarly to the SD one. Change MMC handling a bit by
selecting/deselecting on each transfer like SD, which allows
for several MMC devices in theory and is more uniform.
Change-Id: I7024cb19c079553806138ead75b00640f1d2d95c
Merge sd and mmc drivers into a single sdmmc driver. This allows
some factoring of the code and simplify bug fixing. Also fix the
dma/cache related issue by doing all transfers via a correctly
aligned buffer. The current code is not smart enough to take
advantage of large user buffers currently but at least it is safe!
Change-Id: Ib0fd16dc7d52ef7bfe99fd586e03ecf08691edcd
There are tricky DMA/cache related issue on the imx233 which could
pop up with the old driver. The new one ensures that all dma
tranfers are cache safe by using an intermediate buffer.
Change-Id: I72060682d1c285c83ae16455cfdb62f372b5d687
Reduce DMA maximum transfer size since transfering 64Kb requires
to set a size of 0 and it's not worth adding checks everywhere
to handle this special case. Also add statistics about unaligned
transfer (wrt to cache). Update debug screen accordingly and
simplify it so it can fit smaller screens too.
Change-Id: I18391702f5e100a21f6f8d1ebab28d9f2bd8c66f
Also, add dummy defines for application targets so that ERRORF, etc
map to DEBUGF instead of a compile error and add a new line at the
end of logf.c.
Change-Id: Ie7c5bc3397a853af619e810defce6123114e7a51
Logs information, errors, etc to disk using the register_storage_idle_func
mechanism to write to the disk when available. Currently, this is disabled
in normal builds, but can be enabled by adding ROCKBOX_HAS_LOGDISKF to the
config file. By default, it uses a 2KB buffer and drops text if the buffer
overflows.
The system includes a simple warning level mechanism that can be used to by
default exclude non-serious errors from logging on release builds.
Change-Id: I0a3d186a93625c7c93dae37b993a0d37e5a3a925
Reviewed-on: http://gerrit.rockbox.org/288
Reviewed-by: Jonathan Gordon <rockbox@jdgordon.info>
Tested-by: Michael Giacomelli <mgiacomelli@gmail.com>
Reviewed-by: Michael Giacomelli <mgiacomelli@gmail.com>
It was also broken functionally, probably since a while.So restore the
functionality. Run it on the dap, the tcd files will be placed into .rockbox folder.
Change-Id: Id7a6ce4389dfaf99799258902be80d630af0601c
operation.
The interal ROM clock seems to be needed to reboot the player, so disabling
it is too dangerous. Hopefully this will prevent problems where crashes during
the abort handler resulted in a stock player that needed the battery to drain
in order to reboot.
Change-Id: I7d1e64743dde15b64d718ad3255dada3d570736f