Linus Nielsen Feltzing
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752d0bb8be
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Added DMA register definitions
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6202 a1c6a512-1295-4272-9138-f99709370657
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2005-03-18 11:33:07 +00:00 |
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Linus Nielsen Feltzing
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e52e3f713f
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Correct size for the DCRx registers
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5993 a1c6a512-1295-4272-9138-f99709370657
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2005-02-16 22:14:36 +00:00 |
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Linus Nielsen Feltzing
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b57fd974de
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Correct size for the BCRx registers
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5992 a1c6a512-1295-4272-9138-f99709370657
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2005-02-16 22:10:47 +00:00 |
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Linus Nielsen Feltzing
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672092c6dc
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Made the Coldfire registers volatile, rename PLLCONTROL to PLLCR
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5941 a1c6a512-1295-4272-9138-f99709370657
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2005-02-14 21:30:30 +00:00 |
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Linus Nielsen Feltzing
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58462ab101
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The timer registers are 16-bit
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5364 a1c6a512-1295-4272-9138-f99709370657
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2004-10-27 06:50:00 +00:00 |
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Linus Nielsen Feltzing
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515d819d3e
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CPU definitions for MCF5249
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5183 a1c6a512-1295-4272-9138-f99709370657
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2004-10-06 13:25:56 +00:00 |
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