Saves 100+ bytes (50 of it in iram), saves a bit of power
Internal LCD clock decreased but with added efficiency of drawing routines
loses only around 2 Hz on the scanrate (~75Hz) while fps is slightly increased
Column offsets are now calculated outside the loops saving a few instructions
Passing a LCD_NOP command after lcd_update turns off Data/Cmd# gpio
saving a bit more power
Added a function lcd_write_cmd_triple() that allows 3 commands to be sent at once
when enabled with LCD_USE_FIFO_FOR_COMMANDS it sends them back to back without
checking FIFO status in between or sending to thhe D/C# Gpio.
Makes an assumption about the FIFO being large enough to
accept 3 commands after being emptied which should be the case on the
clipv1, clipv2, clipplus. I have only enabled it for the clip plus
as thats the only device I have to test it on.
On clip+ the SSP clock is now turned off when screen is off
Change-Id: Ib5fd24697bfe4ac8b8ee017361e789e4a7910d21
Merge clipv1/clipv2 code since they use the same 3x3 matrix
clipzip keyscan buttons now work in bootloader
clipplus untouched (no matrix)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31235 a1c6a512-1295-4272-9138-f99709370657
The new controller framebuffer (different from what is in clipv1/clipv2 and some clip+) has 128 columns, the old has 132 columns and is centered on the screen.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27257 a1c6a512-1295-4272-9138-f99709370657
We can't pop into pc on ARMv4t when using thumb: the T bit won't be
modified if we are returning to a thumb function
Code running on ARMv4t should use the new ldrpc / ldmpc macros instead
of ldr pc, [sp], #4 and ldm(cond) sp!, {regs, pc}
No modification on pure ARM builds and ARMv5+
Note: USE_THUMB is currently never defined, no targets can currently be
built with -mthumb, see FS#6734
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26756 a1c6a512-1295-4272-9138-f99709370657
Move code not defined for bootloader under a single preprocessor check
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26219 a1c6a512-1295-4272-9138-f99709370657
GPIO direction needs only to be set at init
both functions are now one liners so make them static inline
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26218 a1c6a512-1295-4272-9138-f99709370657
The code assumed LCD pixels were packed on 16 bits values but for the
Clip we use 8 bits values.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24563 a1c6a512-1295-4272-9138-f99709370657
Reuse some code from Clip (LCD) and a lot of code from AS3525
Add a new CPU type : AS3525v2, identical to AS3525 except it's an ARMv5 (arm926-ejs)
SD code still not working
For an unknown reason LCD doesn't work anymore (to be investigated)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24131 a1c6a512-1295-4272-9138-f99709370657
Increase maximum event count as we need more (I actually had a report about it during custom statusbar testing).
Removed corresponding functions from the core and plugin api. Bump min version and sort.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23302 a1c6a512-1295-4272-9138-f99709370657
- cache IRAM and DRAM
- map IRAM just next to DRAM to remove the need for -mlong-calls and reduce binsize
- tweak delays in Fuze button code
- tweak delays in Clip button code (down button sometimes doesn't respond anyway : an alternate driver is being worked on)
Before reporting any problem, please check your filesystem or format your player from the OF
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21228 a1c6a512-1295-4272-9138-f99709370657
Fix CGU_DBOP setting
Set PCLK to the exact frequency (62MHz, not the maximal frequency)
Use a better comment for CLK_DIV macro
Use preprocessor safety checks for clock divider sizes to avoid future mistakes (not for SD_IDENT frequency since that check is handled by mci_set_clock_divider)
Use maximal IDE frequency of 66MHz (like OF), not 90MHz like written in AS3525 datasheet. The IDE chip is somehow linked to internal storage, and a too high frequency could affect the storage driver.
Use the same DBOP frequency of 32MHz for all models (like OF, verified clip, fuze, e200v2 and m200v4), compromise between performance and battery life could be added in the future for each target
Performance increase on Sansa Fuze with DBOP freq. set to 64MHz: +12% fps for lcd_update, +1% fps for yuv
Thanks to daytona955 on the forums for his help
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20923 a1c6a512-1295-4272-9138-f99709370657
a) lcd_enabled() is now lcd_active(), and is available for HAVE_LCD_SLEEP only targets (e.g. ipod video) too. It was depandent on HAVE_LCD_ENALE only before
b) rename the hook accordingly, and implement the hook for other other targets too (e.g. the clip [the only mono target with lcd_enable/lcd_sleep yet, so the code is still in the lcd driver], ipod, fuze, c200)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20331 a1c6a512-1295-4272-9138-f99709370657
If we don't set pin B6 to 1, display can go off at random times
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19364 a1c6a512-1295-4272-9138-f99709370657
Reorder system_init() to initialize peripherals not only in bootloader
Use a 65MHz PCLK (and memclk) which will be needed for realtime decoding
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19330 a1c6a512-1295-4272-9138-f99709370657
