Daniel Stenberg
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2acc0ac542
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Updated our source code header to explicitly mention that we are GPL v2 or
later. We still need to hunt down snippets used that are not. 1324 modified
files...
http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
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2008-06-28 18:10:04 +00:00 |
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Jens Arnold
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b85b6be3aa
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Coldfire targets: enable buffered writes by default. Speeds up all sorts of I/O that writes to ports: LCD update (except the functions using DMA on H300), ATA writes, .... Some timings had to be adjusted for the new configuration.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15129 a1c6a512-1295-4272-9138-f99709370657
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2007-10-15 21:16:50 +00:00 |
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Steve Bavin
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c90c18ea67
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Thanks to LinusN, fix Coldfire bootloaders not booting - FS#7533
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14949 a1c6a512-1295-4272-9138-f99709370657
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2007-10-02 07:54:50 +00:00 |
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Jens Arnold
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3deb27053a
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Fix red bootloader builds. * Fix non-working PP5022 bootloaders. Also define correct IRAM size for PP5022/PP5024 bootloaders.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14015 a1c6a512-1295-4272-9138-f99709370657
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2007-07-26 21:51:44 +00:00 |
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Jens Arnold
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c49d5dd631
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Coldfire targets: Adjusted PLL settings (lowest possible VCO clock for each setting) and IDE timing (especially it's faster now on M5+X5). * Added/updated table showing the necessary settings (PLL, refresh, waitstates, IDE timing) for each possible clock frequency.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13230 a1c6a512-1295-4272-9138-f99709370657
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2007-04-21 09:29:01 +00:00 |
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Jens Arnold
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8876018d25
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Bring up the M5 port to a working stage: Extended numerous explicit checks for IAUDIO_X5 to also check for IAUDIO_M5, moved code around the target tree, added preliminary background for the sim.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12610 a1c6a512-1295-4272-9138-f99709370657
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2007-03-05 00:04:00 +00:00 |
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