* Allows both SD interfaces to have requests in flight simultaneously
* Fixed a deadlock in the hotswap code
* Ensure TX DMA is idle before initiating a request (bug due to a typo)
Change-Id: I988fa29df5f8e41fc6bbdcc517db89842003b34d
(More specifically, use the SoC's "OS Timer", slaved to the main XTAL so
it doesn't matter how the main CPU is clocked)
Change-Id: I799561ac823ff7f659a05144cf03b6a13d57ea7b
default/low speed is 192 MHz, Max is 576
Downclock PCLK/MCLK/etc to 96MHz to save a bit of juice
Honestly the high speed could be dialed down to, eg 384
as this thing is so bloody fast..
Change-Id: Ie65597c74290f1603e65f69dae8e75b59c8ba0b4
PLL0 Needs to be a multiple of 48MHz for sane USB operation!
(Indeed, "typical" clock for this part is 528, but that seems a
waste of power)
Also fixes a minor bugaboo in the jz4670 usb divisor calculation
that won't matter until we enable reclocking
Change-Id: I40b1fd1ae48871e50885981ccc8b01feb711b9a5
Cleaned up, rebased, and forward-ported from the xvortex fork.
(original credit to vsoftster@gmail.com)
Change-Id: Ibcc023a0271ea81e901450a88317708c2683236d
Signed-off-by: Solomon Peachy <pizza@shaftnet.org>
