5 commits

Author	SHA1	Message	Date
Michael Sevakis	2220a4b695	Improve imx31 interrupt code for PMIC and GPIO ... Fix stuff that was bugging me about the way I did it at first. While messing around I found RDS code wasn't masking its GPIO ISR as it should, which might lead to two different interrupts messing with the static data. Change-Id: I54626809ea3039a842af0cc9e3e42853326c4193	2017-01-29 19:07:55 -05:00
Michael Sevakis	5a8da163c8	i.MX31 - Dethreading operations continue ... Dispense with "pmic" thread and process PMIC events directly within ISR. Add sense bit reading as part of the handling. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31528 a1c6a512-1295-4272-9138-f99709370657	2012-01-02 18:32:35 +00:00
Michael Sevakis	12375d1d3a	Merge functionality of wakeups and semaphores-- fewer APIs and object types. semaphore_wait takes a timeout now so codecs and plugins have to be made incompatible. Don't make semaphores for targets not using them. ... git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29492 a1c6a512-1295-4272-9138-f99709370657	2011-03-02 08:49:38 +00:00
Michael Sevakis	931e06de64	i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code. ... git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25800 a1c6a512-1295-4272-9138-f99709370657	2010-05-04 10:07:53 +00:00
Michael Sevakis	7abf2b53a4	Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. ... git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25547 a1c6a512-1295-4272-9138-f99709370657	2010-04-09 01:21:53 +00:00

Renamed from firmware/target/arm/imx31/gigabeat-s/adc-imx31.c (Browse further)