Back off to 480MHz [max] clock, bus/mem clock of 120MHz.
576 is unstable on at least one unit, and 528 still glitches.
Change-Id: I020e48532524e739f3bfa42bed570381ccd34959
* Don't stop clock before switching speeds
* Don't stop clock prior to transactions
* Stop clock at the end of transactions
Will result in slightly better performance and some power saving when
we're not actively using the SD peripheral.
Change-Id: I1c82476cad97137b1469900645ecf7bb0887119a
* Check to see if clock is [not] running prior to [en|dis]abling it
* Stop clock _prior_ to resetting controller
* Stop clock after transaction is completed, not before initiating it
* Use controller's low power mode (disables clocks when idle)
* Fix, and enable, interrupt-driven DMA transfers
* Fixes for full interrupt-driven operation (WIP, still broken)
Change-Id: I723ffa6450fc85f97898c8a8b3e538ae31c4858e
There's a code path that calls sd_init_device() while we hold sd_mtx, but
sd_init_device() tries to obtain the mutex while doing its work.
Change-Id: I882c595e9e7cd2224b1db0d413925668628476e9
* Allows both SD interfaces to have requests in flight simultaneously
* Fixed a deadlock in the hotswap code
* Ensure TX DMA is idle before initiating a request (bug due to a typo)
Change-Id: I988fa29df5f8e41fc6bbdcc517db89842003b34d
(More specifically, use the SoC's "OS Timer", slaved to the main XTAL so
it doesn't matter how the main CPU is clocked)
Change-Id: I799561ac823ff7f659a05144cf03b6a13d57ea7b
PLL1 clock for those frequencies has been dropped from 508 to 169.5 MHz,
so it's still a respectable reduction.
(I'm not sure how/why it ever worked with the XTAL source, but it did,
and was off by an audible amount)
Change-Id: I614d87e7dfdfe9210702b9c646d3863c06d6780b
* for <= 48KHz, BCLK must be 256*freq (ie bdiv = 4)
* for <= 96KHz, BCLK must be 128*freq (ie bdiv = 2)
* for 11/22/44/88 KHz, disable PLL1 and run off XTAL
* cut PLL1 with 12/24/48/98 KHz audio from 516->86MHz
* cut PLL1 with 8/16/32/64 KHz audio from 426->106.5MHz
This should result in significant power savings for
common 44.1KHz audio playback, and pretty good savings
for everything else.
As an added bonus:
* enable de-emphasis filters at 32, 44.1, and 48 KHz
Change-Id: Ie59067cd46c47e62abf4a32c53519efad104d6c8
default/low speed is 192 MHz, Max is 576
Downclock PCLK/MCLK/etc to 96MHz to save a bit of juice
Honestly the high speed could be dialed down to, eg 384
as this thing is so bloody fast..
Change-Id: Ie65597c74290f1603e65f69dae8e75b59c8ba0b4
PLL0 Needs to be a multiple of 48MHz for sane USB operation!
(Indeed, "typical" clock for this part is 528, but that seems a
waste of power)
Also fixes a minor bugaboo in the jz4670 usb divisor calculation
that won't matter until we enable reclocking
Change-Id: I40b1fd1ae48871e50885981ccc8b01feb711b9a5
Allow IPod 3rd generation to recognize when USB is connected and reboot into disk mode.
This problem is listed at the bottom of the Ipod status page https://www.rockbox.org/wiki/IpodStatus
Change-Id: I8f32afd065d3a91cddc56fe63454bd082bfa29b9
Note: I left behind lcd_bitmap in features.txt, because removing it
would require considerable work in the manual and the translations.
Change-Id: Ia8ca7761f610d9332a0d22a7d189775fb15ec88a
'swcodec' is now always set (and recording_swcodec for recording-capable
units) in feature.txt so the manual and language strings don't need to
all be fixed up.
Change-Id: Ib2c9d5d157af8d33653e2d4b4a12881b9aa6ddb0
HAVE_LCD_BITMAP is now redundant.
lcd_bitmap is always-on in features.txt so manual and lang strings
don't have to change
Change-Id: I08eeb20de48099ffc2dc23782711af368c2ec794
If we come up and the RTC is in a reset state, we need to release that
before trying to initialze anything else. (See IMX23RM 23.8.1 and 39.3.10)
Change-Id: I1820ab771ba81f7d428d07040b7d188d9f688127
Main/IRQ from: 7.5/0.75 to: 7.25/1.0
With the reduction of the opus codec stack usage, giving the IRQ stack
some additional breathing room is now possible.
Change-Id: Id0cd3747fcaab70e2360667ac8c1a97ba7234ccf
Linux offers the high-level i2c-dev driver to directly access the
i2c bus(ses) on the system. This system device is used to get rid
of the (rather silly) radio chip kernel module for ypr0 target and
correctly enables radio access also for the ypr1 target.
fm-radio chip is located on i2c-0 bus on the ypr0 target while it
is located on i2c-1 bus on the ypr1 target.
Power-up (RST) pin is also handled for both targets, which is wired
to another GPIO of the i.MX 37 platform.
Additionally, this patch simplifies the RDS low-level handling by
exploiting the Si4709 debug interface which comes with a mutex
protection as free bonus.
Change-Id: I839282bec4a27ad0ad8403c5a8dd86963b77e1bf
For reasons that are still unclear, the 'ncbss' region was overlapping
the "audiobuffer" when linked with 2.21, but okay with 2.20.
Fixed it by making the audiobuffer explcitly use the current position
instead of relying on it being implicit.
With this change, portalplayer-based targets generate working binaries
when built with binutils 2.21 or newer.
This bug also theoretically affects imx233/imx31 targets as they
also have NOCACHE_BASE games in their linker scripts, but I lack
access to one to test with.
Change-Id: Idb38ab20f03599b9ed3d4bc0eafe519f38677438
