Commit graph

9 commits

Author SHA1 Message Date
Michael Sevakis
9f0bad0efe Byteswap routines don't really need 'asm volatile', just 'asm' since it should be safe to move them for optimizing. Clean up the line endings for ARM.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29394 a1c6a512-1295-4272-9138-f99709370657
2011-02-25 00:46:39 +00:00
Michael Sevakis
18770dac2e Use __builtin_constant_p() to select the best byteswapping method: constant or target optimized. Same macro can then be used for constant values and inits as well as non-constant.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29171 a1c6a512-1295-4272-9138-f99709370657
2011-01-30 00:58:45 +00:00
Andrew Mahone
c76d940c06 Replace 1UL in BIT_N with 1U to avoid turning it into a 64-bit operation on 64-bit sim targets.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21197 a1c6a512-1295-4272-9138-f99709370657
2009-06-06 00:58:57 +00:00
Andrew Mahone
de7c5711c5 Add a system-wide BIT_N macro, implemented via an LUT on SH, and use it in the TAGCACHE_IS_* macros in place of per-set LUTs, removing duplication of data between those LUTs and the mask values used on other targets.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21195 a1c6a512-1295-4272-9138-f99709370657
2009-06-06 00:00:58 +00:00
Michael Sevakis
21f0c9a282 Make basic cache functions into calls, and get rid of CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
2009-02-11 12:55:51 +00:00
Daniel Stenberg
2acc0ac542 Updated our source code header to explicitly mention that we are GPL v2 or
later. We still need to hunt down snippets used that are not. 1324 modified
files...
http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
2008-06-28 18:10:04 +00:00
Michael Sevakis
af395f4db6 Do core interrupt masking in a less general fashion and save some instructions to decrease size and speed things up a little bit. Small fix to a few places where interrupts would get enabled again where they shouldn't have been (context switching calls when disabled).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16811 a1c6a512-1295-4272-9138-f99709370657
2008-03-26 01:50:41 +00:00
Jens Arnold
36ba4b02bd A bit of clarification of code origin. No code change.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13173 a1c6a512-1295-4272-9138-f99709370657
2007-04-15 22:52:42 +00:00
Jens Arnold
4c151dcb21 Oops, forgot to commit 2 new files...
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13115 a1c6a512-1295-4272-9138-f99709370657
2007-04-11 23:54:34 +00:00