Commit graph

8 commits

Author SHA1 Message Date
Aidan MacDonald
15e3d37110 x1000: core PCM recording support
Change-Id: I71883272cc3bffadc1235b0931c3f42bb38e4c1e
2022-01-16 19:17:25 -05:00
Aidan MacDonald
3ae6fbc600 x1000: default to sending 0 samples on underflow
Previously it used the last sample, which turns out to be broken.
The AIC appears to send out a random non-zero sample continously
after boot -- probably because the last sample is uninitialized by
the hardware. Disabling playback is supposed to make it send zero
samples irregardless of the LSMP bit according to the docs, but it
doesn't seem to work this way.

- Change eliminates the white noise heard on the M3K after boot.
- Change has no adverse effects on the Q1.
- Leave Eros Q on the old setting since sending zeros exacerbates
  clicking due to DAC's automute feature.

Change-Id: I9996793fc34f4475b19700d076b11505353b3836
2021-10-05 12:46:01 +01:00
Solomon Peachy
39fff5cb53 move PCM_NATIVE_BITDEPTH definiton into global config code
Change-Id: I391bcffca670916c2c88426e2ba2603351326cee
2021-08-07 11:18:19 -04:00
Dana Conrad
a2bbd1a549 Fix warnings from 56b0dde545
Need a default bit depth in pcm-x1000.c

Change-Id: I2c6af227975d2f47609b51090638012d8406ec1e
2021-08-07 09:43:17 -05:00
Dana Conrad
56b0dde545 Higher bitdepth software volume scaling
Operates between 0 and -74 dB (mute) without issue

Change-Id: I497e002bd8db43833a09ebbc29212fbb6cc8ebfd
2021-08-07 14:21:47 +00:00
Aidan MacDonald
e85bc74b30 x1000: GPIO refactor
The GPIO API was pretty clunky and pin settings were decentralized,
making it hard to see what was happening and making GPIO stuff look
like a mess, frankly.

Instead of passing clunky (port, pin) pairs everywhere, GPIOs are now
identified with a single int. The extra overhead should be minimal as
GPIO configuration is generally not on a performance-critical path.

Pin assignments are now mostly consolidated in gpio-target.h and put
in various tables so gpio_init() can assign most pins at boot time.

Most drivers no longer need to touch GPIOs and basic pin I/O stuff
can happen without config since pins are put into the right state.
IRQ pins still need to be configured manually before use.

Change-Id: Ic5326284b0b2a2f613e9e76a41cb50e24af3aa47
2021-06-06 11:06:14 +00:00
Aidan MacDonald
f63edb52ef x1000: refactor AIC initialization
Have pcm-x1000 handle most work, so target's audiohw code touches
only the relevant settings.

Change-Id: Icf3d1b7ca428ac50a5a16ecec39ed8186ac5ae13
2021-05-30 19:17:50 +00:00
Aidan MacDonald
3ec66893e3 New port: FiiO M3K on bare metal
Change-Id: I7517e7d5459e129dcfc9465c6fbd708619888fbe
2021-03-28 00:01:37 +00:00