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Fix the S5L8701 µsec timer

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23747 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann 2009-11-25 19:15:19 +00:00
parent 84f04a57ee
commit f788e8feff
1 changed files with 3 additions and 3 deletions
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6
firmware/export/s5l8700.h
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@ -310,9 +310,9 @@
#define TDDATA1 (*(REG32_PTR_T)(0x3C70006C)) /* Data1 Register */
#define TDPRE (*(REG32_PTR_T)(0x3C700070)) /* Pre-scale register */
#define TDCNT (*(REG32_PTR_T)(0x3C700074)) /* Counter register */
#define FIVE_USEC_TIMER (((*(REG32_PTR_T)(0x3C700080)) << 32) \
| (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */
#define USEC_TIMER ((*(REG32_PTR_T)(0x3C700084)) * 5) /* lower 32 bits of the above as a usec timer */
#define FIVE_USEC_TIMER (((uint64_t)(*(REG32_PTR_T)(0x3C700080)) << 32) \
| (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */
#define USEC_TIMER FIVE_USEC_TIMER * 5 /* usecs */
/* 12. NAND FLASH CONTROLER */
#if CONFIG_CPU==S5L8701