Serial DMA works
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@483 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Linus Nielsen Feltzing
parent
1e0323a1bd
commit
dba731f4b5
2 changed files with 120 additions and 127 deletions
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@ -10,8 +10,8 @@ CFLAGS = -g -Wall -m1 -nostdlib -Wstrict-prototypes -fschedule-insns -fno-builti
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AFLAGS += -small -relax
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OBJS= ../../crt0.o main.o ../../drivers/i2c.o ../../drivers/mas.o \
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../../debug.o ../../kernel.o ../../thread.o ../../common/sprintf.o \
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../../panic.o mp3data.o
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../../debug.o ../../kernel.o thread.o ../../common/sprintf.o \
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../../panic.o ../../system.o ../../drivers/led.o mp3data.o
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%.o: %.S
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$(CC) -o $@ $(CFLAGS) $(INCLUDES) $(DEFS) -c $<
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@ -44,3 +44,7 @@ clean:
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install:
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mount /mnt/archos; cp archos.mod /mnt/archos; umount /mnt/archos
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thread.o: ../../thread.c
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$(CC) -O $(CFLAGS) -c $<
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@ -16,10 +16,12 @@
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "types.h"
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#include "i2c.h"
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#include "mas.h"
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#include "sh7034.h"
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#include "debug.h"
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#include "kernel.h"
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unsigned char fliptable[] =
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{
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@ -59,10 +61,14 @@ unsigned char fliptable[] =
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extern unsigned char mp3data[];
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extern int mp3datalen;
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unsigned char *mp3dataptr;
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int mp3_transmitted;
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bool dma_on;
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void setup_sci0(void)
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{
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PBCR1 = (PBCR1 & 0xccff) | 0x0200;
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PBCR1 = (PBCR1 & 0xccff) | 0x1200;
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/* set PB12 to output */
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PBIOR |= 0x1000;
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@ -86,19 +92,20 @@ void setup_sci0(void)
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IPRD &= 0x0ff0;
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/* set IRQ6 and IRQ7 to edge detect */
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// ICR |= 0x03;
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ICR |= 0x03;
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/* set PB15 and PB14 to inputs */
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PBIOR &= 0x7fff;
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PBIOR &= 0xbfff;
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/* set IRQ6 prio 8 and IRQ7 prio 0 */
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// IPRB = ( IPRB & 0xff00 ) | 0x80;
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IPRB = ( IPRB & 0xff00 ) | 0x0080;
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IPRB = 0;
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/* Enable End of DMA interrupt at prio 8 */
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IPRC = (IPRC & 0xf0ff) | 0x0800;
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/* Enable Tx (only!) */
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SCR0 |= 0xa0;
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// SCR0 |= 0xa0;
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}
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int mas_tx_ready(void)
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@ -109,160 +116,142 @@ int mas_tx_ready(void)
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void init_dma(void)
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{
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SAR3 = (unsigned int) mp3data;
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DAR3 = 0xFFFFEC3;
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CHCR3 = 0x1500; /* Single address destination, TXI0 */
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DAR3 = 0x5FFFEC3;
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CHCR3 &= ~0x0002; /* Clear interrupt */
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CHCR3 = 0x1504; /* Single address destination, TXI0, IE=1 */
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DTCR3 = 64000;
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DMAOR = 0x0001; /* Enable DMA */
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}
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void start_dma(void)
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{
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CHCR3 |= 1;
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SCR0 |= 0x80;
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dma_on = TRUE;
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}
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void stop_dma(void)
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{
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CHCR3 &= ~1;
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SCR0 &= 0x7f;
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dma_on = FALSE;
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}
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void dma_tick(void)
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{
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if(!dma_on)
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{
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if(PBDR & 0x4000)
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{
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if(!(SCR0 & 0x80))
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start_dma();
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}
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}
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}
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int main(void)
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{
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char buf[40];
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char str[32];
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int i=0;
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int dma_on = 0;
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char buf[40];
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char str[32];
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int i=0;
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/* Clear it all! */
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/* Clear it all! */
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SSR1 &= ~(SCI_RDRF | SCI_ORER | SCI_PER | SCI_FER);
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/* This enables the serial Rx interrupt, to be able to exit into the
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debugger when you hit CTRL-C */
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SCR1 |= 0x40;
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SCR1 &= ~0x80;
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asm ("ldc\t%0,sr" : : "r"(0<<4));
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debugf("Olle: %d\n", 7);
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i2c_init();
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dma_on = TRUE;
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i2c_init();
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debugf("I2C Init done\n");
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i=mas_readmem(MAS_BANK_D1,0xff6,(unsigned long*)buf,2);
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if (i) {
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debugf("Error - mas_readmem() returned %d\n", i);
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while(1);
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}
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kernel_init();
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tick_add_task(dma_tick);
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i = buf[0] | buf[1] << 8;
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debugf("MAS version: %x\n", i);
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i = buf[4] | buf[5] << 8;
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debugf("MAS revision: %x\n", i);
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set_irq_level(0);
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i=mas_readmem(MAS_BANK_D1,0xff9,(unsigned long*)buf,7);
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if (i) {
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debugf("Error - mas_readmem() returned %d\n", i);
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while(1);
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}
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setup_sci0();
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for(i = 0;i < 7;i++)
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{
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str[i*2+1] = buf[i*4];
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str[i*2] = buf[i*4+1];
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}
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str[i*2] = 0;
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debugf("Description: %s\n", str);
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i=mas_readmem(MAS_BANK_D1,0xff6,(unsigned long*)buf,2);
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if (i) {
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debugf("Error - mas_readmem() returned %d\n", i);
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while(1);
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}
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i=mas_readreg(0xe6);
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if (i < 0) {
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debugf("Error - mas_readreg() returned %d\n", i);
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while(1);
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}
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i = buf[0] | buf[1] << 8;
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debugf("MAS version: %x\n", i);
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i = buf[4] | buf[5] << 8;
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debugf("MAS revision: %x\n", i);
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debugf("Register 0xe6: %x\n", i);
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i=mas_readmem(MAS_BANK_D1,0xff9,(unsigned long*)buf,7);
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if (i) {
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debugf("Error - mas_readmem() returned %d\n", i);
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while(1);
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}
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debugf("Writing register 0xaa\n");
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i=mas_writereg(0xaa, 0x1);
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if (i < 0) {
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debugf("Error - mas_writereg() returned %d\n", i);
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while(1);
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}
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for(i = 0;i < 7;i++)
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{
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str[i*2+1] = buf[i*4];
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str[i*2] = buf[i*4+1];
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}
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str[i*2] = 0;
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debugf("Description: %s\n", str);
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i=mas_readreg(0xaa);
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if (i < 0) {
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debugf("Error - mas_readreg() returned %d\n", i);
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while(1);
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}
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i=mas_writereg(0x3b, 0x20);
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if (i < 0) {
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debugf("Error - mas_writereg() returned %d\n", i);
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while(1);
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}
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debugf("Register 0xaa: %x\n", i);
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debugf("Writing register 0xaa again\n");
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i=mas_writereg(0xaa, 0);
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if (i < 0) {
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debugf("Error - mas_writereg() returned %d\n", i);
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while(1);
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}
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i=mas_readreg(0xaa);
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if (i < 0) {
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debugf("Error - mas_readreg() returned %d\n", i);
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while(1);
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}
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debugf("Register 0xaa: %x\n", i);
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i=mas_readreg(0xed);
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if (i < 0) {
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debugf("Error - mas_readreg(ed) returned %d\n", i);
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while(1);
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}
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debugf("Register 0xed: %x\n", i);
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i=mas_writereg(0x3b, 0x20);
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if (i < 0) {
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debugf("Error - mas_writereg() returned %d\n", i);
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while(1);
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}
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i = mas_run(1);
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if (i < 0) {
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debugf("Error - mas_run() returned %d\n", i);
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while(1);
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}
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i = mas_run(1);
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if (i < 0) {
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debugf("Error - mas_run() returned %d\n", i);
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while(1);
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}
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setup_sci0();
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for(i = 0;i < mp3datalen;i++)
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{
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mp3data[i] = fliptable[mp3data[i]];
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}
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i = 0;
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while(1)
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{
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debugf("let's play...\n");
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init_dma();
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mp3dataptr = mp3data;
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mp3_transmitted = 0;
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dma_on = TRUE;
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/* Enable Tx (only!) */
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SCR0 |= 0xa0;
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CHCR3 |= 1;
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init_dma();
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while(1)
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{
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/* Demand pin high? */
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if(PBDR & 0x4000)
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{
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start_dma();
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#if 0
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/* More data to write? */
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if(i < mp3datalen)
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{
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/* Transmitter ready? */
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while(!mas_tx_ready()){};
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/* Write data into TDR and clear TDRE */
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TDR0 = fliptable[mp3data[i++]];
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SSR0 &= ~SCI_TDRE;
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}
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#endif
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}
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else
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{
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stop_dma();
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}
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}
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while(1);
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debugf("sleeping...\n");
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sleep(10000);
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}
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}
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#pragma interrupt
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void IRQ6(void)
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{
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stop_dma();
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}
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#pragma interrupt
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void DEI3(void)
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{
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mp3_transmitted += 64000;
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if(mp3_transmitted < mp3datalen)
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{
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DTCR3 = 64000;
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CHCR3 &= ~0x0002;
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}
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else
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{
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CHCR3 = 0;
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}
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}
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