imx233: fix system for stmp3600 and stmp3700
Change-Id: I2b425b56358ed21269beae27a4afb490939b7f9d
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8d7cc320b7
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1 changed files with 15 additions and 0 deletions
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@ -30,7 +30,9 @@
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#include "dma-imx233.h"
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#include "ssp-imx233.h"
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#include "i2c-imx233.h"
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#if IMX233_SUBTARGET >= 3700
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#include "dcp-imx233.h"
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#endif
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#include "pwm-imx233.h"
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#include "icoll-imx233.h"
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#include "lradc-imx233.h"
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@ -44,7 +46,11 @@
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void imx233_chip_reset(void)
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{
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#if IMX233_SUBTARGET >= 3700
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HW_CLKCTRL_RESET = BM_CLKCTRL_RESET_CHIP;
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#else
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HW_POWER_RESET = BF_OR2(POWER_RESET, UNLOCK_V(KEY), RST_DIG(1));
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#endif
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}
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void system_reboot(void)
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@ -109,7 +115,9 @@ void system_init(void)
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* Make sure IO clock is running at expected speed */
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imx233_clkctrl_init();
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imx233_clkctrl_enable(CLK_PLL, true);
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#if IMX233_SUBTARGET >= 3700
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imx233_clkctrl_set_frac_div(CLK_IO, 18); // clk_io@clk_pll
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#endif
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imx233_rtc_init();
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imx233_icoll_init();
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@ -117,7 +125,9 @@ void system_init(void)
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imx233_timrot_init();
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imx233_dma_init();
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imx233_ssp_init();
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#if IMX233_SUBTARGET >= 3700
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imx233_dcp_init();
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#endif
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imx233_pwm_init();
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imx233_lradc_init();
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imx233_power_init();
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@ -166,8 +176,13 @@ void udelay(unsigned us)
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void imx233_digctl_set_arm_cache_timings(unsigned timings)
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{
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#if IMX233_SUBTARGET >= 3780
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HW_DIGCTL_ARMCACHE = BF_OR5(DIGCTL_ARMCACHE, ITAG_SS(timings),
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DTAG_SS(timings), CACHE_SS(timings), DRTY_SS(timings), VALID_SS(timings));
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#else
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HW_DIGCTL_ARMCACHE = BF_OR3(DIGCTL_ARMCACHE, ITAG_SS(timings),
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DTAG_SS(timings), CACHE_SS(timings));
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#endif
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}
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#ifdef HAVE_ADJUSTABLE_CPU_FREQ
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