Commit the common portion of FS#9708: ATA (IDE) DMA by Boris Gjenero with a couple cosmetic tweaks and without the inclusion of 'FS#9721: No error check after writes in ata.c'changes (which can be done separately). No code is changed for targets without HAVE_ATA_DMA defined other than to not display DMA modes in the View Disk Info debug screen if not using DMA (Gigabeat F/X/S were). No target uses the code yet but Gigabeat S use will follow shortly.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20298 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis
parent
01c390d5c5
commit
bc8cab4c24
3 changed files with 229 additions and 59 deletions
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@ -2029,7 +2029,7 @@ static int disk_callback(int btn, struct gui_synclist *lists)
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simplelist_addline(SIMPLELIST_ADD_LINE,
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"No timing info");
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}
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#if defined (TOSHIBA_GIGABEAT_F) || defined (TOSHIBA_GIGABEAT_S)
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#ifdef HAVE_ATA_DMA
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if (identify_info[63] & (1<<0)) {
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char mdma0[2], mdma1[2], mdma2[2];
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mdma0[1] = mdma1[1] = mdma2[1] = 0;
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@ -2047,24 +2047,25 @@ static int disk_callback(int btn, struct gui_synclist *lists)
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simplelist_addline(SIMPLELIST_ADD_LINE,
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"No MDMA mode info");
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}
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if (identify_info[88] & (1<<0)) {
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char udma0[2], udma1[2], udma2[2], udma3[2], udma4[2], udma5[2];
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udma0[1] = udma1[1] = udma2[1] = udma3[1] = udma4[1] = udma5[1] = 0;
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if (identify_info[53] & (1<<2)) {
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char udma0[2], udma1[2], udma2[2], udma3[2], udma4[2], udma5[2], udma6[2];
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udma0[1] = udma1[1] = udma2[1] = udma3[1] = udma4[1] = udma5[1] = udma6[1] = 0;
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udma0[0] = (identify_info[88] & (1<<0)) ? '0' : 0;
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udma1[0] = (identify_info[88] & (1<<1)) ? '1' : 0;
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udma2[0] = (identify_info[88] & (1<<2)) ? '2' : 0;
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udma3[0] = (identify_info[88] & (1<<3)) ? '3' : 0;
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udma4[0] = (identify_info[88] & (1<<4)) ? '4' : 0;
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udma5[0] = (identify_info[88] & (1<<5)) ? '5' : 0;
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udma6[0] = (identify_info[88] & (1<<6)) ? '6' : 0;
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simplelist_addline(SIMPLELIST_ADD_LINE,
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"UDMA modes: %s %s %s %s %s %s", udma0, udma1, udma2,
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udma3, udma4, udma5);
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"UDMA modes: %s %s %s %s %s %s %s", udma0, udma1, udma2,
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udma3, udma4, udma5, udma6);
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}
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else {
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simplelist_addline(SIMPLELIST_ADD_LINE,
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"No UDMA mode info");
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}
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#endif /* defined (TOSHIBA_GIGABEAT_F) || defined (TOSHIBA_GIGABEAT_S) */
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#endif /* HAVE_ATA_DMA */
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timing_info_present = identify_info[53] & (1<<1);
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if(timing_info_present) {
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i = identify_info[49] & (1<<11);
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@ -2079,6 +2080,18 @@ static int disk_callback(int btn, struct gui_synclist *lists)
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}
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simplelist_addline(SIMPLELIST_ADD_LINE,
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"Cluster size: %d bytes", fat_get_cluster_size(IF_MV(0)));
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#ifdef HAVE_ATA_DMA
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i = ata_get_dma_mode();
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if (i == 0) {
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simplelist_addline(SIMPLELIST_ADD_LINE,
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"DMA not enabled");
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} else {
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simplelist_addline(SIMPLELIST_ADD_LINE,
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"DMA mode: %s %c",
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(i & 0x40) ? "UDMA" : "MDMA",
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'0' + (i & 7));
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}
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#endif /* HAVE_ATA_DMA */
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return btn;
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}
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#else /* No SD, MMC or ATA */
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@ -60,6 +60,12 @@
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#define CMD_SLEEP 0xE6
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#define CMD_SET_FEATURES 0xEF
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#define CMD_SECURITY_FREEZE_LOCK 0xF5
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#ifdef HAVE_ATA_DMA
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#define CMD_READ_DMA 0xC8
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#define CMD_READ_DMA_EXT 0x25
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#define CMD_WRITE_DMA 0xCA
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#define CMD_WRITE_DMA_EXT 0x35
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#endif
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/* Should all be < 0x100 (which are reserved for control messages) */
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#define Q_SLEEP 0
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@ -188,6 +194,10 @@ static struct sector_cache_entry sector_cache;
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static int phys_sector_mult = 1;
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#endif
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#ifdef HAVE_ATA_DMA
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static int dma_mode = 0;
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#endif
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static int ata_power_on(void);
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static int perform_soft_reset(void);
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static int set_multiple_mode(int sectors);
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@ -308,6 +318,9 @@ int ata_read_sectors(IF_MV2(int drive,)
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int count;
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void* buf;
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long spinup_start;
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#ifdef HAVE_ATA_DMA
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bool usedma = false;
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#endif
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#ifndef MAX_PHYS_SECTOR_SIZE
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#ifdef HAVE_MULTIVOLUME
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@ -358,6 +371,12 @@ int ata_read_sectors(IF_MV2(int drive,)
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ret = 0;
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last_disk_activity = current_tick;
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#ifdef HAVE_ATA_DMA
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/* If DMA is supported and parameters are ok for DMA, use it */
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if (dma_mode && ata_dma_setup(inbuf, incount * SECTOR_SIZE, false))
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usedma = true;
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#endif
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#ifdef HAVE_LBA48
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if (lba48)
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{
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@ -370,7 +389,11 @@ int ata_read_sectors(IF_MV2(int drive,)
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SET_REG(ATA_HCYL, 0); /* 47:40 */
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SET_REG(ATA_HCYL, (start >> 16) & 0xff); /* 23:16 */
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SET_REG(ATA_SELECT, SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
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SET_REG(ATA_COMMAND, usedma ? CMD_READ_DMA_EXT : CMD_READ_MULTIPLE_EXT);
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#else
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SET_REG(ATA_COMMAND, CMD_READ_MULTIPLE_EXT);
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#endif
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}
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else
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#endif
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@ -380,7 +403,11 @@ int ata_read_sectors(IF_MV2(int drive,)
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SET_REG(ATA_LCYL, (start >> 8) & 0xff);
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SET_REG(ATA_HCYL, (start >> 16) & 0xff);
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SET_REG(ATA_SELECT, ((start >> 24) & 0xf) | SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
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SET_REG(ATA_COMMAND, usedma ? CMD_READ_DMA : CMD_READ_MULTIPLE);
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#else
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SET_REG(ATA_COMMAND, CMD_READ_MULTIPLE);
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#endif
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}
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/* wait at least 400ns between writing command and reading status */
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@ -390,22 +417,13 @@ int ata_read_sectors(IF_MV2(int drive,)
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__asm__ volatile ("nop");
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__asm__ volatile ("nop");
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while (count) {
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int sectors;
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int wordcount;
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int status;
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#ifdef HAVE_ATA_DMA
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if (usedma) {
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if (!ata_dma_finish())
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ret = -7;
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if (!wait_for_start_of_transfer()) {
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/* We have timed out waiting for RDY and/or DRQ, possibly
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because the hard drive is shaking and has problems reading
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the data. We have two options:
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1) Wait some more
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2) Perform a soft reset and try again.
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We choose alternative 2.
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*/
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if (ret != 0) {
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perform_soft_reset();
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ret = -5;
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goto retry;
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}
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@ -415,36 +433,67 @@ int ata_read_sectors(IF_MV2(int drive,)
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sleeping = false;
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poweroff = false;
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}
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}
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else
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#endif /* HAVE_ATA_DMA */
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{
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while (count) {
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int sectors;
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int wordcount;
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int status;
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/* read the status register exactly once per loop */
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status = ATA_STATUS;
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if (!wait_for_start_of_transfer()) {
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/* We have timed out waiting for RDY and/or DRQ, possibly
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because the hard drive is shaking and has problems
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reading the data. We have two options:
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1) Wait some more
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2) Perform a soft reset and try again.
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if (count >= multisectors )
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sectors = multisectors;
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else
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sectors = count;
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We choose alternative 2.
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*/
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perform_soft_reset();
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ret = -5;
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goto retry;
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}
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wordcount = sectors * SECTOR_SIZE / 2;
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if (spinup) {
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spinup_time = current_tick - spinup_start;
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spinup = false;
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sleeping = false;
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poweroff = false;
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}
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copy_read_sectors(buf, wordcount);
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/* read the status register exactly once per loop */
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status = ATA_STATUS;
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/*
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"Device errors encountered during READ MULTIPLE commands are
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posted at the beginning of the block or partial block transfer,
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but the DRQ bit is still set to one and the data transfer shall
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take place, including transfer of corrupted data, if any."
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-- ATA specification
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*/
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if ( status & (STATUS_BSY | STATUS_ERR | STATUS_DF) ) {
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perform_soft_reset();
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ret = -6;
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goto retry;
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if (count >= multisectors )
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sectors = multisectors;
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else
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sectors = count;
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wordcount = sectors * SECTOR_SIZE / 2;
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copy_read_sectors(buf, wordcount);
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/*
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"Device errors encountered during READ MULTIPLE commands
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are posted at the beginning of the block or partial block
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transfer, but the DRQ bit is still set to one and the data
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transfer shall take place, including transfer of corrupted
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data, if any."
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-- ATA specification
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*/
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if ( status & (STATUS_BSY | STATUS_ERR | STATUS_DF) ) {
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perform_soft_reset();
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ret = -6;
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goto retry;
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}
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buf += sectors * SECTOR_SIZE; /* Advance one chunk of sectors */
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count -= sectors;
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last_disk_activity = current_tick;
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}
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buf += sectors * SECTOR_SIZE; /* Advance one chunk of sectors */
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count -= sectors;
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last_disk_activity = current_tick;
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}
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if(!ret && !wait_for_end_of_transfer()) {
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@ -515,6 +564,9 @@ int ata_write_sectors(IF_MV2(int drive,)
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int i;
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int ret = 0;
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long spinup_start;
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#ifdef HAVE_ATA_DMA
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bool usedma = false;
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#endif
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#ifndef MAX_PHYS_SECTOR_SIZE
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#ifdef HAVE_MULTIVOLUME
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@ -554,6 +606,12 @@ int ata_write_sectors(IF_MV2(int drive,)
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goto error;
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}
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#ifdef HAVE_ATA_DMA
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/* If DMA is supported and parameters are ok for DMA, use it */
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if (dma_mode && ata_dma_setup((void *)buf, count * SECTOR_SIZE, true))
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usedma = true;
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#endif
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#ifdef HAVE_LBA48
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if (lba48)
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{
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@ -566,7 +624,11 @@ int ata_write_sectors(IF_MV2(int drive,)
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SET_REG(ATA_HCYL, 0); /* 47:40 */
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SET_REG(ATA_HCYL, (start >> 16) & 0xff); /* 23:16 */
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SET_REG(ATA_SELECT, SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
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SET_REG(ATA_COMMAND, usedma ? CMD_WRITE_DMA_EXT : CMD_WRITE_SECTORS_EXT);
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#else
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SET_REG(ATA_COMMAND, CMD_WRITE_SECTORS_EXT);
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#endif
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}
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else
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#endif
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@ -576,32 +638,51 @@ int ata_write_sectors(IF_MV2(int drive,)
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SET_REG(ATA_LCYL, (start >> 8) & 0xff);
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SET_REG(ATA_HCYL, (start >> 16) & 0xff);
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SET_REG(ATA_SELECT, ((start >> 24) & 0xf) | SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
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SET_REG(ATA_COMMAND, usedma ? CMD_WRITE_DMA : CMD_WRITE_SECTORS);
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#else
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SET_REG(ATA_COMMAND, CMD_WRITE_SECTORS);
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#endif
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}
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for (i=0; i<count; i++) {
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if (!wait_for_start_of_transfer()) {
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ret = -3;
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break;
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}
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if (spinup) {
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#ifdef HAVE_ATA_DMA
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if (usedma) {
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if (!ata_dma_finish())
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ret = -7;
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else if (spinup) {
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spinup_time = current_tick - spinup_start;
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spinup = false;
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sleeping = false;
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poweroff = false;
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}
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}
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else
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#endif /* HAVE_ATA_DMA */
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{
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for (i=0; i<count; i++) {
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copy_write_sectors(buf, SECTOR_SIZE/2);
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if (!wait_for_start_of_transfer()) {
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ret = -3;
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break;
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}
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if (spinup) {
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spinup_time = current_tick - spinup_start;
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spinup = false;
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sleeping = false;
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poweroff = false;
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}
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copy_write_sectors(buf, SECTOR_SIZE/2);
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#ifdef USE_INTERRUPT
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/* reading the status register clears the interrupt */
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j = ATA_STATUS;
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/* reading the status register clears the interrupt */
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j = ATA_STATUS;
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#endif
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buf += SECTOR_SIZE;
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buf += SECTOR_SIZE;
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last_disk_activity = current_tick;
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last_disk_activity = current_tick;
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}
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}
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if(!ret && !wait_for_end_of_transfer()) {
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@ -1039,7 +1120,12 @@ static int perform_soft_reset(void)
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SET_REG(ATA_CONTROL, CONTROL_nIEN|CONTROL_SRST );
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sleep(1); /* >= 5us */
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#ifdef HAVE_ATA_DMA
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/* DMA requires INTRQ be enabled */
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SET_REG(ATA_CONTROL, 0);
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#else
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SET_REG(ATA_CONTROL, CONTROL_nIEN);
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#endif
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sleep(1); /* >2ms */
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/* This little sucker can take up to 30 seconds */
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@ -1179,6 +1265,22 @@ static int set_multiple_mode(int sectors)
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return 0;
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}
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#ifdef HAVE_ATA_DMA
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static int get_best_mode(unsigned short identword, int max, int modetype)
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{
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unsigned short testbit = 1u << max;
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while (1) {
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if (identword & testbit)
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return max | modetype;
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testbit >>= 1;
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if (!testbit)
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return 0;
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max--;
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}
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}
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#endif
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static int set_features(void)
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{
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static struct {
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@ -1191,6 +1293,9 @@ static int set_features(void)
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{ 83, 3, 0x05, 0x80 }, /* adv. power management: lowest w/o standby */
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{ 83, 9, 0x42, 0x80 }, /* acoustic management: lowest noise */
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{ 82, 6, 0xaa, 0 }, /* enable read look-ahead */
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#ifdef HAVE_ATA_DMA
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{ 0, 0, 0x03, 0 }, /* DMA mode */
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#endif
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};
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int i;
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int pio_mode = 2;
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@ -1204,6 +1309,23 @@ static int set_features(void)
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/* Update the table: set highest supported pio mode that we also support */
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features[0].parameter = 8 + pio_mode;
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#ifdef HAVE_ATA_DMA
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if (identify_info[53] & (1<<2))
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/* Ultra DMA mode info present, find a mode */
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dma_mode = get_best_mode(identify_info[88], ATA_MAX_UDMA, 0x40);
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if (!dma_mode) {
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/* No UDMA mode found, try to find a multi-word DMA mode */
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dma_mode = get_best_mode(identify_info[63], ATA_MAX_MWDMA, 0x20);
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features[4].id_word = 63;
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}
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else
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features[4].id_word = 88;
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features[4].id_bit = dma_mode & 7;
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features[4].parameter = dma_mode;
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#endif /* HAVE_ATA_DMA */
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SET_REG(ATA_SELECT, ata_device);
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@ -1237,6 +1359,10 @@ static int set_features(void)
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ata_set_pio_timings(pio_mode);
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#endif
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#ifdef HAVE_ATA_DMA
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ata_dma_set_mode(dma_mode);
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#endif
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return 0;
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}
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@ -1305,6 +1431,11 @@ int ata_init(void)
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sleep(HZ/4); /* allow voltage to build up */
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}
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#ifdef HAVE_ATA_DMA
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/* DMA requires INTRQ be enabled */
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SET_REG(ATA_CONTROL, 0);
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#endif
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/* first try, hard reset at cold start only */
|
||||
rc = init_and_check(coldstart);
|
||||
|
||||
|
|
@ -1450,3 +1581,17 @@ void ata_get_info(struct storage_info *info)
|
|||
info->revision=revision;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_ATA_DMA
|
||||
/* Returns last DMA mode as set by set_features() */
|
||||
int ata_get_dma_mode(void)
|
||||
{
|
||||
return dma_mode;
|
||||
}
|
||||
|
||||
/* Needed to allow updating while waiting for DMA to complete */
|
||||
void ata_keep_active(void)
|
||||
{
|
||||
last_disk_activity = current_tick;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -60,5 +60,17 @@ bool ata_present(IF_MV_NONVOID(int drive));
|
|||
long ata_last_disk_activity(void);
|
||||
int ata_spinup_time(void); /* ticks */
|
||||
|
||||
#ifdef HAVE_ATA_DMA
|
||||
/* Needed to allow updating while waiting for DMA to complete */
|
||||
void ata_keep_active(void);
|
||||
/* Returns current DMA mode */
|
||||
int ata_get_dma_mode(void);
|
||||
/* Set DMA mode for ATA interface */
|
||||
void ata_dma_set_mode(unsigned char mode);
|
||||
/* Sets up DMA transfer */
|
||||
bool ata_dma_setup(void *addr, unsigned long bytes, bool write);
|
||||
/* Waits for DMA transfer completion */
|
||||
bool ata_dma_finish(void);
|
||||
#endif /* HAVE_ATA_DMA */
|
||||
|
||||
#endif
|
||||
#endif /* __ATA_H__ */
|
||||
|
|
|
|||
Loading…
Reference in a new issue