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mips: use .set push/pop in asm code

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Change-Id: I3e7bc7ffb8d6d0c5d18a6ab38b1a270559a62fb9
This commit is contained in:
Solomon Peachy 2020-09-02 08:25:43 -04:00
parent 963e979e6c
commit bb6fc21244
2 changed files with 11 additions and 9 deletions
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13
firmware/asm/mips/thread-mips32.c
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@ -32,14 +32,14 @@ static void USED_ATTR _start_thread(void)
/* t1 = context */ /* t1 = context */
asm volatile ( asm volatile (
"start_thread: \n" "start_thread: \n"
".set push \n"
".set noreorder \n" ".set noreorder \n"
".set noat \n" ".set noat \n"
"lw $8, 4($9) \n" /* Fetch thread function pointer ($8 = t0, $9 = t1) */ "lw $8, 4($9) \n" /* Fetch thread function pointer ($8 = t0, $9 = t1) */
"lw $29, 36($9) \n" /* Set initial sp(=$29) */ "lw $29, 36($9) \n" /* Set initial sp(=$29) */
"jalr $8 \n" /* Start the thread */ "jalr $8 \n" /* Start the thread */
"sw $0, 44($9) \n" /* Clear start address */ "sw $0, 44($9) \n" /* Clear start address */
".set at \n" ".set pop \n"
".set reorder \n"
); );
thread_exit(); thread_exit();
} }
@ -58,6 +58,7 @@ static void USED_ATTR _start_thread(void)
static inline void store_context(void* addr) static inline void store_context(void* addr)
{ {
asm volatile ( asm volatile (
".set push \n"
".set noreorder \n" ".set noreorder \n"
".set noat \n" ".set noat \n"
"move $8, %0 \n" /* Store addr in clobbered t0 othrewise "move $8, %0 \n" /* Store addr in clobbered t0 othrewise
@ -76,8 +77,7 @@ static inline void store_context(void* addr)
"sw $30, 32($8) \n" /* fp */ "sw $30, 32($8) \n" /* fp */
"sw $29, 36($8) \n" /* sp */ "sw $29, 36($8) \n" /* sp */
"sw $31, 40($8) \n" /* ra */ "sw $31, 40($8) \n" /* ra */
".set at \n" ".set pop \n"
".set reorder \n"
: : "r" (addr) : "t0" : : "r" (addr) : "t0"
); );
} }
@ -89,6 +89,7 @@ static inline void store_context(void* addr)
static inline void load_context(const void* addr) static inline void load_context(const void* addr)
{ {
asm volatile ( asm volatile (
".set push \n"
".set noat \n" ".set noat \n"
".set noreorder \n" ".set noreorder \n"
"lw $8, 44(%0) \n" /* Get start address ($8 = t0) */ "lw $8, 44(%0) \n" /* Get start address ($8 = t0) */
@ -113,9 +114,7 @@ static inline void load_context(const void* addr)
"lw $30, 32($8) \n" /* fp */ "lw $30, 32($8) \n" /* fp */
"lw $29, 36($8) \n" /* sp */ "lw $29, 36($8) \n" /* sp */
"lw $31, 40($8) \n" /* ra */ "lw $31, 40($8) \n" /* ra */
".set at \n" ".set pop \n"
".set reorder \n"
: : "r" (addr) : "t0", "t1" : : "r" (addr) : "t0", "t1"
); );
} }

7
firmware/target/mips/ingenic_jz47xx/system-target.h
View file

@ -123,7 +123,10 @@ static inline void core_sleep(void)
#if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B #if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
__cpm_idle_mode(); __cpm_idle_mode();
#endif #endif
asm volatile(".set mips32r2 \n" asm volatile(
".set push \n"
".set mips32r2 \n"
".set noreorder \n"
"mfc0 $8, $12 \n" /* mfc t0, $12 */ "mfc0 $8, $12 \n" /* mfc t0, $12 */
"move $9, $8 \n" /* move t1, t0 */ "move $9, $8 \n" /* move t1, t0 */
"la $10, 0x8000000 \n" /* la t2, 0x8000000 */ "la $10, 0x8000000 \n" /* la t2, 0x8000000 */
@ -131,7 +134,7 @@ static inline void core_sleep(void)
"mtc0 $8, $12 \n" /* mtc t0, $12 */ "mtc0 $8, $12 \n" /* mtc t0, $12 */
"wait \n" "wait \n"
"mtc0 $9, $12 \n" /* mtc t1, $12 */ "mtc0 $9, $12 \n" /* mtc t1, $12 */
".set mips0 \n" ".set pop \n"
::: "t0", "t1", "t2" ::: "t0", "t1", "t2"
); );
enable_irq(); enable_irq();