Nyaaori/rockbox
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Use set/clr instead of mod functions where applicable.

Browse source 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19486 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2008-12-19 15:30:30 +00:00
parent 2b4290cc12
commit ac5059b1b5
5 changed files with 21 additions and 27 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
View file

@ -51,7 +51,7 @@ void pcm_play_lock(void)
if (++dma_play_data.locked == 1) if (++dma_play_data.locked == 1)
{ {
/* Atomically disable transmit interrupt */ /* Atomically disable transmit interrupt */
imx31_regmod32(&SSI_SIER1, 0, SSI_SIER_TIE); imx31_regclr32(&SSI_SIER1, SSI_SIER_TIE);
} }
} }
@ -60,7 +60,7 @@ void pcm_play_unlock(void)
if (--dma_play_data.locked == 0 && dma_play_data.state != 0) if (--dma_play_data.locked == 0 && dma_play_data.state != 0)
{ {
/* Atomically enable transmit interrupt */ /* Atomically enable transmit interrupt */
imx31_regmod32(&SSI_SIER1, SSI_SIER_TIE, SSI_SIER_TIE); imx31_regset32(&SSI_SIER1, SSI_SIER_TIE);
} }
} }

8
firmware/target/arm/imx31/gigabeat-s/power-imx31.c
View file

@ -63,7 +63,7 @@ void ide_power_enable(bool on)
if (!on) if (!on)
{ {
/* Bus must be isolated before power off */ /* Bus must be isolated before power off */
imx31_regmod32(&GPIO2_DR, (1 << 16), (1 << 16)); imx31_regset32(&GPIO2_DR, (1 << 16));
} }
/* HD power switch */ /* HD power switch */
@ -73,7 +73,7 @@ void ide_power_enable(bool on)
{ {
/* Bus switch may be turned on after powerup */ /* Bus switch may be turned on after powerup */
sleep(HZ/10); sleep(HZ/10);
imx31_regmod32(&GPIO2_DR, 0, (1 << 16)); imx31_regclr32(&GPIO2_DR, (1 << 16));
} }
} }
@ -91,7 +91,7 @@ bool tuner_power(bool status)
we can diable the i2c module when not in use */ we can diable the i2c module when not in use */
i2c_enable_node(&si4700_i2c_node, true); i2c_enable_node(&si4700_i2c_node, true);
/* enable the fm chip */ /* enable the fm chip */
imx31_regmod32(&GPIO1_DR, (1 << 26), (1 << 26)); imx31_regset32(&GPIO1_DR, (1 << 26));
/* enable CLK32KMCU clock */ /* enable CLK32KMCU clock */
mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN); mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
} }
@ -101,7 +101,7 @@ bool tuner_power(bool status)
we can diable the i2c module when not in use */ we can diable the i2c module when not in use */
i2c_enable_node(&si4700_i2c_node, false); i2c_enable_node(&si4700_i2c_node, false);
/* disable the fm chip */ /* disable the fm chip */
imx31_regmod32(&GPIO1_DR, 0, (1 << 26)); imx31_regclr32(&GPIO1_DR, (1 << 26));
/* disable CLK32KMCU clock */ /* disable CLK32KMCU clock */
mc13783_clear(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN); mc13783_clear(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
} }

16
firmware/target/arm/imx31/gigabeat-s/system-imx31.c
View file

@ -89,14 +89,14 @@ void system_init(void)
/* MCR WFI enables wait mode */ /* MCR WFI enables wait mode */
CLKCTL_CCMR &= ~(3 << 14); CLKCTL_CCMR &= ~(3 << 14);
imx31_regmod32(&SDHC1_CLOCK_CONTROL, STOP_CLK, STOP_CLK); imx31_regset32(&SDHC1_CLOCK_CONTROL, STOP_CLK);
imx31_regmod32(&SDHC2_CLOCK_CONTROL, STOP_CLK, STOP_CLK); imx31_regset32(&SDHC2_CLOCK_CONTROL, STOP_CLK);
imx31_regmod32(&RNGA_CONTROL, RNGA_CONTROL_SLEEP, RNGA_CONTROL_SLEEP); imx31_regset32(&RNGA_CONTROL, RNGA_CONTROL_SLEEP);
imx31_regmod32(&UCR1_1, 0, EUARTUCR1_UARTEN); imx31_regclr32(&UCR1_1, EUARTUCR1_UARTEN);
imx31_regmod32(&UCR1_2, 0, EUARTUCR1_UARTEN); imx31_regclr32(&UCR1_2, EUARTUCR1_UARTEN);
imx31_regmod32(&UCR1_3, 0, EUARTUCR1_UARTEN); imx31_regclr32(&UCR1_3, EUARTUCR1_UARTEN);
imx31_regmod32(&UCR1_4, 0, EUARTUCR1_UARTEN); imx31_regclr32(&UCR1_4, EUARTUCR1_UARTEN);
imx31_regmod32(&UCR1_5, 0, EUARTUCR1_UARTEN); imx31_regclr32(&UCR1_5, EUARTUCR1_UARTEN);
for (i = 0; i < ARRAYLEN(disable_clocks); i++) for (i = 0; i < ARRAYLEN(disable_clocks); i++)
imx31_clkctl_module_clock_gating(disable_clocks[i], CGM_OFF); imx31_clkctl_module_clock_gating(disable_clocks[i], CGM_OFF);

8
firmware/target/arm/imx31/gigabeat-s/usb-imx31.c
View file

@ -38,16 +38,16 @@ static void enable_transceiver(bool enable)
{ {
if (GPIO1_DR & (1 << 30)) if (GPIO1_DR & (1 << 30))
{ {
imx31_regmod32(&GPIO3_DR, 0, (1 << 16)); /* Reset ISP1504 */ imx31_regclr32(&GPIO3_DR, (1 << 16)); /* Reset ISP1504 */
sleep(HZ/100); sleep(HZ/100);
imx31_regmod32(&GPIO3_DR, (1 << 16), (1 << 16)); imx31_regset32(&GPIO3_DR, (1 << 16));
sleep(HZ/10); sleep(HZ/10);
imx31_regmod32(&GPIO1_DR, 0, (1 << 30)); /* Select ISP1504 */ imx31_regclr32(&GPIO1_DR, (1 << 30)); /* Select ISP1504 */
} }
} }
else else
{ {
imx31_regmod32(&GPIO1_DR, (1 << 30), (1 << 30)); /* Deselect ISP1504 */ imx31_regset32(&GPIO1_DR, (1 << 30)); /* Deselect ISP1504 */
} }
} }

12
firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c
View file

@ -62,19 +62,13 @@ void audiohw_init(void)
audiohw_preinit(); audiohw_preinit();
GPIO3_DR |= (1 << 21); /* Turn on analogue LDO */ imx31_regset32(&GPIO3_DR, (1 << 21)); /* Turn on analogue LDO */
} }
void audiohw_enable_headphone_jack(bool enable) void audiohw_enable_headphone_jack(bool enable)
{ {
if (enable) /* Turn headphone jack output on or off. */
{ imx31_regmod32(&GPIO3_DR, enable ? (1 << 22) : 0, (1 << 22));
GPIO3_DR |= (1 << 22); /* Turn on headphone jack output */
}
else
{
GPIO3_DR &= ~(1 << 22); /* Turn off headphone jack output */
}
} }
void wmcodec_write(int reg, int data) void wmcodec_write(int reg, int data)