Use set/clr instead of mod functions where applicable.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19486 a1c6a512-1295-4272-9138-f99709370657
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2b4290cc12
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ac5059b1b5
5 changed files with 21 additions and 27 deletions
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@ -51,7 +51,7 @@ void pcm_play_lock(void)
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if (++dma_play_data.locked == 1)
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{
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/* Atomically disable transmit interrupt */
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imx31_regmod32(&SSI_SIER1, 0, SSI_SIER_TIE);
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imx31_regclr32(&SSI_SIER1, SSI_SIER_TIE);
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}
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}
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@ -60,7 +60,7 @@ void pcm_play_unlock(void)
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if (--dma_play_data.locked == 0 && dma_play_data.state != 0)
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{
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/* Atomically enable transmit interrupt */
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imx31_regmod32(&SSI_SIER1, SSI_SIER_TIE, SSI_SIER_TIE);
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imx31_regset32(&SSI_SIER1, SSI_SIER_TIE);
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}
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}
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@ -63,7 +63,7 @@ void ide_power_enable(bool on)
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if (!on)
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{
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/* Bus must be isolated before power off */
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imx31_regmod32(&GPIO2_DR, (1 << 16), (1 << 16));
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imx31_regset32(&GPIO2_DR, (1 << 16));
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}
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/* HD power switch */
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@ -73,7 +73,7 @@ void ide_power_enable(bool on)
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{
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/* Bus switch may be turned on after powerup */
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sleep(HZ/10);
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imx31_regmod32(&GPIO2_DR, 0, (1 << 16));
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imx31_regclr32(&GPIO2_DR, (1 << 16));
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}
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}
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@ -91,7 +91,7 @@ bool tuner_power(bool status)
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we can diable the i2c module when not in use */
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i2c_enable_node(&si4700_i2c_node, true);
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/* enable the fm chip */
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imx31_regmod32(&GPIO1_DR, (1 << 26), (1 << 26));
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imx31_regset32(&GPIO1_DR, (1 << 26));
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/* enable CLK32KMCU clock */
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mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
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}
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@ -101,7 +101,7 @@ bool tuner_power(bool status)
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we can diable the i2c module when not in use */
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i2c_enable_node(&si4700_i2c_node, false);
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/* disable the fm chip */
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imx31_regmod32(&GPIO1_DR, 0, (1 << 26));
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imx31_regclr32(&GPIO1_DR, (1 << 26));
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/* disable CLK32KMCU clock */
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mc13783_clear(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
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}
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@ -89,14 +89,14 @@ void system_init(void)
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/* MCR WFI enables wait mode */
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CLKCTL_CCMR &= ~(3 << 14);
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imx31_regmod32(&SDHC1_CLOCK_CONTROL, STOP_CLK, STOP_CLK);
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imx31_regmod32(&SDHC2_CLOCK_CONTROL, STOP_CLK, STOP_CLK);
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imx31_regmod32(&RNGA_CONTROL, RNGA_CONTROL_SLEEP, RNGA_CONTROL_SLEEP);
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imx31_regmod32(&UCR1_1, 0, EUARTUCR1_UARTEN);
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imx31_regmod32(&UCR1_2, 0, EUARTUCR1_UARTEN);
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imx31_regmod32(&UCR1_3, 0, EUARTUCR1_UARTEN);
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imx31_regmod32(&UCR1_4, 0, EUARTUCR1_UARTEN);
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imx31_regmod32(&UCR1_5, 0, EUARTUCR1_UARTEN);
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imx31_regset32(&SDHC1_CLOCK_CONTROL, STOP_CLK);
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imx31_regset32(&SDHC2_CLOCK_CONTROL, STOP_CLK);
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imx31_regset32(&RNGA_CONTROL, RNGA_CONTROL_SLEEP);
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imx31_regclr32(&UCR1_1, EUARTUCR1_UARTEN);
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imx31_regclr32(&UCR1_2, EUARTUCR1_UARTEN);
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imx31_regclr32(&UCR1_3, EUARTUCR1_UARTEN);
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imx31_regclr32(&UCR1_4, EUARTUCR1_UARTEN);
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imx31_regclr32(&UCR1_5, EUARTUCR1_UARTEN);
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for (i = 0; i < ARRAYLEN(disable_clocks); i++)
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imx31_clkctl_module_clock_gating(disable_clocks[i], CGM_OFF);
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@ -38,16 +38,16 @@ static void enable_transceiver(bool enable)
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{
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if (GPIO1_DR & (1 << 30))
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{
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imx31_regmod32(&GPIO3_DR, 0, (1 << 16)); /* Reset ISP1504 */
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imx31_regclr32(&GPIO3_DR, (1 << 16)); /* Reset ISP1504 */
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sleep(HZ/100);
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imx31_regmod32(&GPIO3_DR, (1 << 16), (1 << 16));
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imx31_regset32(&GPIO3_DR, (1 << 16));
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sleep(HZ/10);
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imx31_regmod32(&GPIO1_DR, 0, (1 << 30)); /* Select ISP1504 */
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imx31_regclr32(&GPIO1_DR, (1 << 30)); /* Select ISP1504 */
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}
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}
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else
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{
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imx31_regmod32(&GPIO1_DR, (1 << 30), (1 << 30)); /* Deselect ISP1504 */
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imx31_regset32(&GPIO1_DR, (1 << 30)); /* Deselect ISP1504 */
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}
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}
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@ -62,19 +62,13 @@ void audiohw_init(void)
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audiohw_preinit();
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GPIO3_DR |= (1 << 21); /* Turn on analogue LDO */
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imx31_regset32(&GPIO3_DR, (1 << 21)); /* Turn on analogue LDO */
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}
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void audiohw_enable_headphone_jack(bool enable)
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{
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if (enable)
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{
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GPIO3_DR |= (1 << 22); /* Turn on headphone jack output */
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}
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else
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{
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GPIO3_DR &= ~(1 << 22); /* Turn off headphone jack output */
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}
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/* Turn headphone jack output on or off. */
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imx31_regmod32(&GPIO3_DR, enable ? (1 << 22) : 0, (1 << 22));
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}
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void wmcodec_write(int reg, int data)
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