AS3525 : enable instruction and data cache

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18969 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2008-11-01 23:40:59 +00:00
parent 307d009cf1
commit a85e2cd991

View file

@ -201,6 +201,16 @@ void system_init(void)
CGU_PERI |= CGU_GPIO_CLOCK_ENABLE;
#endif
asm volatile(
"mov r0, #0 \n"
"mcr p15, 0, r0, c7, c7 \n" /* invalidate icache & dcache */
"mrc p15, 0, r0, c1, c0 \n" /* control register */
"orr r0, r0, #0x1000 \n" /* enable icache */
"orr r0, r0, #4 \n" /* enable dcache */
"mcr p15, 0, r0, c1, c0 \n"
: : : "r0" );
sdram_init();
}