Convert the TCC77x ADC driver to use interrupts - based on the technique used in the SH ADC driver.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17311 a1c6a512-1295-4272-9138-f99709370657
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3 changed files with 69 additions and 23 deletions
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@ -82,6 +82,7 @@
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/* IRQ Controller */
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#define TIMER0_IRQ_MASK (1<<6)
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#define ADC_IRQ_MASK (1<<16)
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#define IEN (*(volatile unsigned long *)0x80000100)
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#define CREQ (*(volatile unsigned long *)0x80000104)
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@ -24,48 +24,93 @@
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#include "string.h"
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#include "adc.h"
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/*
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TODO: We probably want to do this on the timer interrupt once we get
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interrupts going - see the sh-adc.c implementation for an example which
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looks like it should work well with the TCC77x.
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*/
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/**************************************************************************
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** The A/D conversion is done every tick, in three steps:
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**
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** 1) On the tick interrupt, the conversion of channels 0-3 is started, and
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** the A/D interrupt is enabled.
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**
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** 2) After the conversion is done, an interrupt
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** is generated at level 1, which is the same level as the tick interrupt
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** itself. This interrupt will be pending until the tick interrupt is
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** finished.
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** When the A/D interrupt is finally served, it will read the results
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** from the first conversion and start the conversion of channels 4-7.
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**
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** 3) When the conversion of channels 4-7 is finished, the interrupt is
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** triggered again, and the results are read. This time, no new
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** conversion is started, it will be done in the next tick interrupt.
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**
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** Thus, each channel will be updated HZ times per second.
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**
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*************************************************************************/
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static int channel_group;
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static unsigned short adcdata[8];
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static void adc_do_read(void)
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/* Tick task */
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static void adc_tick(void)
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{
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/* Start a conversion of channels 0-3. This will trigger an interrupt,
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and the interrupt handler will take care of channels 4-7. */
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int i;
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uint32_t adc_status;
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PCLKCFG6 |= (1<<15); /* Enable ADC clock */
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channel_group = 0;
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/* Start converting the first 4 channels */
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for (i = 0; i < 4; i++)
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ADCCON = i;
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/* Wait for data to become stable */
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while ((ADCDATA & 0x1) == 0);
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}
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/* Now read the values back */
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for (i=0;i < 4; i++) {
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/* IRQ handler */
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void ADC(void)
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{
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int num;
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int i;
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uint32_t adc_status;
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do
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{
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adc_status = ADCSTATUS;
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adcdata[(adc_status >> 16) & 0x7] = adc_status & 0x3ff;
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}
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num = (adc_status>>24) & 7;
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if (num) adcdata[(adc_status >> 16) & 0x7] = adc_status & 0x3ff;
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} while (num);
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PCLKCFG6 &= ~(1<<15); /* Disable ADC clock */
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if (channel_group == 0)
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{
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/* Start conversion of channels 4-7 */
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for (i = 4; i < 8; i++)
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ADCCON = i;
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channel_group = 1;
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}
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else
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{
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PCLKCFG6 &= ~(1<<15); /* Disable ADC clock */
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}
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}
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unsigned short adc_read(int channel)
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{
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adc_do_read();
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return adcdata[channel];
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}
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void adc_init(void)
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{
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int i;
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ADCCON = (1<<4); /* Leave standby mode */
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ADCCFG |= 0x00000003; /* Single-mode, auto power-down */
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/* IRQ enable, auto power-down, single-mode */
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ADCCFG |= (1<<3) | (1<<1) | (1<<0);
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/* Unmask ADC IRQ */
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IEN |= ADC_IRQ_MASK;
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tick_add_task(adc_tick);
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sleep(2); /* Ensure adc_data[] contains data before returning */
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}
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@ -21,7 +21,9 @@
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#include "system.h"
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#include "panic.h"
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/* Externally defined interrupt handlers */
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extern void TIMER(void);
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extern void ADC(void);
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void irq(void)
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{
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@ -29,13 +31,11 @@ void irq(void)
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CREQ = irq; /* Clears the corresponding IRQ status */
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if (irq & TIMER0_IRQ_MASK)
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{
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TIMER();
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}
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else if (irq & ADC_IRQ_MASK)
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ADC();
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else
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{
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panicf("Unhandled IRQ 0x%08X", irq);
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}
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}
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void fiq_handler(void)
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