MIPS:
* Add assembly optimised variants for memcpy, memset and find_first_set_bit * Add option to map_address in MMU to set caching algorithm git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19920 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Maurus Cuelenaere
parent
01bd736e00
commit
9b13a5d151
5 changed files with 446 additions and 11 deletions
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@ -400,15 +400,13 @@ target/arm/crt0.S
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#elif defined(CPU_MIPS)
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#undef mips
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/*target/mips/memcpy.S
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target/mips/memset.S
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common/memset16.c
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target/mips/strlen.S*/
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common/memcpy.c
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/*target/mips/strlen.S*/
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common/memmove.c
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common/memset.c
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common/memset16.c
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common/strlen.c
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target/mips/ffs-mips.S
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target/mips/memcpy-mips.S
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target/mips/memset-mips.S
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target/mips/mmu-mips.c
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#if CONFIG_CPU==JZ4732
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target/mips/ingenic_jz47xx/crt0.S
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54
firmware/target/mips/ffs-mips.S
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54
firmware/target/mips/ffs-mips.S
Normal file
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@ -0,0 +1,54 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2009 by Maurus Cuelenaere
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* based on ffs-arm.S by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "mips.h"
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/****************************************************************************
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* int find_first_set_bit(uint32_t val);
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*
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* Find the index of the least significant set bit in the 32-bit word.
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*
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* return values:
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* 0 - bit 0 is set
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* 1 - bit 1 is set
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* ...
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* 31 - bit 31 is set
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* 32 - no bits set
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****************************************************************************/
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.align 2
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.global find_first_set_bit
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.type find_first_set_bit, %function
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find_first_set_bit:
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beqz a0, no_bits_set # If val == 0 branch to no_bits_set
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clz v0, a0 # Get lead 0's count
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li t0, 31 # t0 = 31
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sub v0, t0, v0 # Return value = t0 - v0
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jr ra # Return
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nop
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no_bits_set:
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li v0, 32 # Return value = 32
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jr ra # Return
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nop
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143
firmware/target/mips/memcpy-mips.S
Normal file
143
firmware/target/mips/memcpy-mips.S
Normal file
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@ -0,0 +1,143 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002, 2003 Free Software Foundation, Inc.
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* This file was originally part of the GNU C Library
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* Contributed to glibc by Hartvig Ekner <hartvige@mips.com>, 2002
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* Adapted for Rockbox by Maurus Cuelenaere, 2009
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "mips.h"
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/* void *memcpy(void *s1, const void *s2, size_t n); */
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#ifdef ROCKBOX_BIG_ENDIAN
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# define LWHI lwl /* high part is left in big-endian */
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# define SWHI swl /* high part is left in big-endian */
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# define LWLO lwr /* low part is right in big-endian */
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# define SWLO swr /* low part is right in big-endian */
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#else
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# define LWHI lwr /* high part is right in little-endian */
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# define SWHI swr /* high part is right in little-endian */
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# define LWLO lwl /* low part is left in little-endian */
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# define SWLO swl /* low part is left in little-endian */
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#endif
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.section .icode, "ax", %progbits
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.global memcpy
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.type memcpy, %function
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.set noreorder
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memcpy:
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slti t0, a2, 8 # Less than 8?
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bne t0, zero, last8
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move v0, a0 # Setup exit value before too late
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xor t0, a1, a0 # Find a0/a1 displacement
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andi t0, 0x3
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bne t0, zero, shift # Go handle the unaligned case
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subu t1, zero, a1
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andi t1, 0x3 # a0/a1 are aligned, but are we
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beq t1, zero, chk8w # starting in the middle of a word?
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subu a2, t1
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LWHI t0, 0(a1) # Yes we are... take care of that
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addu a1, t1
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SWHI t0, 0(a0)
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addu a0, t1
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chk8w:
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andi t0, a2, 0x1f # 32 or more bytes left?
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beq t0, a2, chk1w
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subu a3, a2, t0 # Yes
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addu a3, a1 # a3 = end address of loop
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move a2, t0 # a2 = what will be left after loop
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lop8w:
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lw t0, 0(a1) # Loop taking 8 words at a time
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lw t1, 4(a1)
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lw t2, 8(a1)
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lw t3, 12(a1)
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lw t4, 16(a1)
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lw t5, 20(a1)
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lw t6, 24(a1)
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lw t7, 28(a1)
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addiu a0, 32
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addiu a1, 32
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sw t0, -32(a0)
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sw t1, -28(a0)
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sw t2, -24(a0)
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sw t3, -20(a0)
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sw t4, -16(a0)
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sw t5, -12(a0)
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sw t6, -8(a0)
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bne a1, a3, lop8w
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sw t7, -4(a0)
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chk1w:
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andi t0, a2, 0x3 # 4 or more bytes left?
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beq t0, a2, last8
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subu a3, a2, t0 # Yes, handle them one word at a time
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addu a3, a1 # a3 again end address
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move a2, t0
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lop1w:
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lw t0, 0(a1)
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addiu a0, 4
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addiu a1, 4
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bne a1, a3, lop1w
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sw t0, -4(a0)
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last8:
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blez a2, lst8e # Handle last 8 bytes, one at a time
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addu a3, a2, a1
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lst8l:
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lb t0, 0(a1)
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addiu a0, 1
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addiu a1, 1
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bne a1, a3, lst8l
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sb t0, -1(a0)
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lst8e:
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jr ra # Bye, bye
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nop
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shift:
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subu a3, zero, a0 # Src and Dest unaligned
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andi a3, 0x3 # (unoptimized case...)
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beq a3, zero, shft1
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subu a2, a3 # a2 = bytes left
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LWHI t0, 0(a1) # Take care of first odd part
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LWLO t0, 3(a1)
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addu a1, a3
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SWHI t0, 0(a0)
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addu a0, a3
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shft1:
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andi t0, a2, 0x3
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subu a3, a2, t0
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addu a3, a1
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shfth:
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LWHI t1, 0(a1) # Limp through, word by word
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LWLO t1, 3(a1)
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addiu a0, 4
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addiu a1, 4
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bne a1, a3, shfth
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sw t1, -4(a0)
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b last8 # Handle anything which may be left
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move a2, t0
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.set reorder
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239
firmware/target/mips/memset-mips.S
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239
firmware/target/mips/memset-mips.S
Normal file
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@ -0,0 +1,239 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* This file was originally part of the Linux/MIPS GNU C Library
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* Copyright (C) 1998 by Ralf Baechle
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* Adapted for Rockbox by Maurus Cuelenaere, 2009
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "mips.h"
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#define FILL256(dst, offset, val) \
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sw val, (offset + 0x00)(dst); \
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sw val, (offset + 0x04)(dst); \
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sw val, (offset + 0x08)(dst); \
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sw val, (offset + 0x0c)(dst); \
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sw val, (offset + 0x10)(dst); \
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sw val, (offset + 0x14)(dst); \
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sw val, (offset + 0x18)(dst); \
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sw val, (offset + 0x1c)(dst); \
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sw val, (offset + 0x20)(dst); \
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sw val, (offset + 0x24)(dst); \
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sw val, (offset + 0x28)(dst); \
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sw val, (offset + 0x2c)(dst); \
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sw val, (offset + 0x30)(dst); \
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sw val, (offset + 0x34)(dst); \
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sw val, (offset + 0x38)(dst); \
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sw val, (offset + 0x3c)(dst); \
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sw val, (offset + 0x40)(dst); \
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sw val, (offset + 0x44)(dst); \
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sw val, (offset + 0x48)(dst); \
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sw val, (offset + 0x4c)(dst); \
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sw val, (offset + 0x50)(dst); \
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sw val, (offset + 0x54)(dst); \
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sw val, (offset + 0x58)(dst); \
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sw val, (offset + 0x5c)(dst); \
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sw val, (offset + 0x60)(dst); \
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sw val, (offset + 0x64)(dst); \
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sw val, (offset + 0x68)(dst); \
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sw val, (offset + 0x6c)(dst); \
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sw val, (offset + 0x70)(dst); \
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sw val, (offset + 0x74)(dst); \
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sw val, (offset + 0x78)(dst); \
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sw val, (offset + 0x7c)(dst); \
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sw val, (offset + 0x80)(dst); \
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sw val, (offset + 0x84)(dst); \
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sw val, (offset + 0x88)(dst); \
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sw val, (offset + 0x8c)(dst); \
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sw val, (offset + 0x90)(dst); \
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sw val, (offset + 0x94)(dst); \
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sw val, (offset + 0x98)(dst); \
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sw val, (offset + 0x9c)(dst); \
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sw val, (offset + 0xa0)(dst); \
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sw val, (offset + 0xa4)(dst); \
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sw val, (offset + 0xa8)(dst); \
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sw val, (offset + 0xac)(dst); \
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sw val, (offset + 0xb0)(dst); \
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sw val, (offset + 0xb4)(dst); \
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sw val, (offset + 0xb8)(dst); \
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sw val, (offset + 0xbc)(dst); \
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sw val, (offset + 0xc0)(dst); \
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sw val, (offset + 0xc4)(dst); \
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sw val, (offset + 0xc8)(dst); \
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sw val, (offset + 0xcc)(dst); \
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sw val, (offset + 0xd0)(dst); \
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sw val, (offset + 0xd4)(dst); \
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sw val, (offset + 0xd8)(dst); \
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sw val, (offset + 0xdc)(dst); \
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sw val, (offset + 0xe0)(dst); \
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sw val, (offset + 0xe4)(dst); \
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sw val, (offset + 0xe8)(dst); \
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sw val, (offset + 0xec)(dst); \
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sw val, (offset + 0xf0)(dst); \
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sw val, (offset + 0xf4)(dst); \
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sw val, (offset + 0xf8)(dst); \
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sw val, (offset + 0xfc)(dst);
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#define FILL128(dst, offset, val) \
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sw val, (offset + 0x00)(dst); \
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sw val, (offset + 0x04)(dst); \
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sw val, (offset + 0x08)(dst); \
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sw val, (offset + 0x0c)(dst); \
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sw val, (offset + 0x10)(dst); \
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sw val, (offset + 0x14)(dst); \
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sw val, (offset + 0x18)(dst); \
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sw val, (offset + 0x1c)(dst); \
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sw val, (offset + 0x20)(dst); \
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sw val, (offset + 0x24)(dst); \
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sw val, (offset + 0x28)(dst); \
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sw val, (offset + 0x2c)(dst); \
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sw val, (offset + 0x30)(dst); \
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sw val, (offset + 0x34)(dst); \
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sw val, (offset + 0x38)(dst); \
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sw val, (offset + 0x3c)(dst); \
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sw val, (offset + 0x40)(dst); \
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sw val, (offset + 0x44)(dst); \
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sw val, (offset + 0x48)(dst); \
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sw val, (offset + 0x4c)(dst); \
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sw val, (offset + 0x50)(dst); \
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sw val, (offset + 0x54)(dst); \
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sw val, (offset + 0x58)(dst); \
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sw val, (offset + 0x5c)(dst); \
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sw val, (offset + 0x60)(dst); \
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sw val, (offset + 0x64)(dst); \
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sw val, (offset + 0x68)(dst); \
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sw val, (offset + 0x6c)(dst); \
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sw val, (offset + 0x70)(dst); \
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sw val, (offset + 0x74)(dst); \
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sw val, (offset + 0x78)(dst); \
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sw val, (offset + 0x7c)(dst);
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#define FILL64(dst, offset, val) \
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sw val, (offset + 0x00)(dst); \
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sw val, (offset + 0x04)(dst); \
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sw val, (offset + 0x08)(dst); \
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sw val, (offset + 0x0c)(dst); \
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sw val, (offset + 0x10)(dst); \
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sw val, (offset + 0x14)(dst); \
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sw val, (offset + 0x18)(dst); \
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sw val, (offset + 0x1c)(dst); \
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sw val, (offset + 0x20)(dst); \
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sw val, (offset + 0x24)(dst); \
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sw val, (offset + 0x28)(dst); \
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sw val, (offset + 0x2c)(dst); \
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sw val, (offset + 0x30)(dst); \
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sw val, (offset + 0x34)(dst); \
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sw val, (offset + 0x38)(dst); \
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sw val, (offset + 0x3c)(dst);
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#define FILL32(dst, offset, val) \
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sw val, (offset + 0x00)(dst); \
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sw val, (offset + 0x04)(dst); \
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sw val, (offset + 0x08)(dst); \
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sw val, (offset + 0x0c)(dst); \
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sw val, (offset + 0x10)(dst); \
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sw val, (offset + 0x14)(dst); \
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sw val, (offset + 0x18)(dst); \
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sw val, (offset + 0x1c)(dst);
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#define FILL 32
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#define F_FILL FILL32
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#ifdef ROCKBOX_BIG_ENDIAN
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# define SWHI swl /* high part is left in big-endian */
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#else
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# define SWHI swr /* high part is right in little-endian */
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#endif
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/*
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* memset(void *s, int c, size_t n)
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*
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* a0: start of area to clear
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* a1: char to fill with
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* a2: size of area to clear
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*/
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.section .icode, "ax", %progbits
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.global memset
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.type memset, %function
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.set noreorder
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.align 5
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memset:
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beqz a1, 1f
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move v0, a0 /* result */
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andi a1, 0xff /* spread fillword */
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sll t1, a1, 8
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or a1, t1
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sll t1, a1, 16
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or a1, t1
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1:
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sltiu t0, a2, 4 /* very small region? */
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bnez t0, small_memset
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andi t0, a0, 3 /* aligned? */
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beqz t0, 1f
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subu t0, 4 /* alignment in bytes */
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SWHI a1, (a0) /* make word aligned */
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||||
subu a0, t0 /* word align ptr */
|
||||
addu a2, t0 /* correct size */
|
||||
|
||||
1: ori t1, a2, (FILL-1) /* # of full blocks */
|
||||
xori t1, (FILL-1)
|
||||
beqz t1, memset_partial /* no block to fill */
|
||||
andi t0, a2, (FILL-4)
|
||||
|
||||
addu t1, a0 /* end address */
|
||||
.set reorder
|
||||
1: addiu a0, FILL
|
||||
F_FILL( a0, -FILL, a1 )
|
||||
bne t1, a0, 1b
|
||||
.set noreorder
|
||||
|
||||
memset_partial:
|
||||
la t1, 2f /* where to start */
|
||||
subu t1, t0
|
||||
jr t1
|
||||
addu a0, t0 /* dest ptr */
|
||||
|
||||
F_FILL( a0, -FILL, a1 ) /* ... but first do words ... */
|
||||
2: andi a2, 3 /* 0 <= n <= 3 to go */
|
||||
|
||||
beqz a2, 1f
|
||||
addu a0, a2 /* What's left */
|
||||
SWHI a1, -1(a0)
|
||||
1: jr ra
|
||||
move a2, zero
|
||||
|
||||
small_memset:
|
||||
beqz a2, 2f
|
||||
addu t1, a0, a2
|
||||
|
||||
1: addiu a0, 1 /* fill bytewise */
|
||||
bne t1, a0, 1b
|
||||
sb a1, -1(a0)
|
||||
|
||||
2: jr ra /* done */
|
||||
move a2, zero
|
||||
|
||||
.set reorder
|
||||
|
|
@ -99,14 +99,15 @@ static void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
|
|||
restore_irq(old_irq);
|
||||
}
|
||||
|
||||
void map_address(unsigned long virtual, unsigned long physical, unsigned long length)
|
||||
void map_address(unsigned long virtual, unsigned long physical,
|
||||
unsigned long length, unsigned int cache_flags)
|
||||
{
|
||||
unsigned long entry0 = (physical & PFN_MASK) << PFN_SHIFT;
|
||||
unsigned long entry1 = ((physical+length) & PFN_MASK) << PFN_SHIFT;
|
||||
unsigned long entryhi = virtual & ~VPN2_SHIFT;
|
||||
|
||||
entry0 |= (M_EntryLoG | M_EntryLoV | (K_CacheAttrC << S_EntryLoC) );
|
||||
entry1 |= (M_EntryLoG | M_EntryLoV | (K_CacheAttrC << S_EntryLoC) );
|
||||
entry0 |= (M_EntryLoG | M_EntryLoV | (cache_flags << S_EntryLoC) );
|
||||
entry1 |= (M_EntryLoG | M_EntryLoV | (cache_flags << S_EntryLoC) );
|
||||
|
||||
add_wired_entry(entry0, entry1, entryhi, DEFAULT_PAGE_MASK);
|
||||
}
|
||||
|
|
@ -119,7 +120,7 @@ void tlb_init(void)
|
|||
|
||||
local_flush_tlb_all();
|
||||
/*
|
||||
map_address(0x80000000, 0x80000000, 0x4000);
|
||||
map_address(0x80004000, 0x80004000, MEM * 0x100000);
|
||||
map_address(0x80000000, 0x80000000, 0x4000, K_CacheAttrC);
|
||||
map_address(0x80004000, 0x80004000, MEM * 0x100000, K_CacheAttrC);
|
||||
*/
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue