imx233: rewrite frequency scaling to use the new function
Change-Id: I0f9968de76ce17710d31f7bc609440654e68b6f1
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1f3979821c
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1 changed files with 4 additions and 20 deletions
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@ -295,8 +295,6 @@ void imx233_set_cpu_frequency(long frequency)
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return;
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/* disable auto-slow (enable back afterwards) */
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imx233_clkctrl_enable_auto_slow(false);
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/* set VDDIO to the right value */
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imx233_power_set_regulator(REGULATOR_VDDIO, 3300, 3125);
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/* WARNING watch out the order ! */
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if(frequency > cpu_frequency)
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@ -305,29 +303,15 @@ void imx233_set_cpu_frequency(long frequency)
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imx233_power_set_regulator(REGULATOR_VDDD, prof->vddd, prof->vddd_bo);
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/* Change ARM cache timings */
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imx233_digctl_set_arm_cache_timings(prof->arm_cache_timings);
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/* Switch CPU to crystal at 24MHz */
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imx233_clkctrl_set_bypass(CLK_CPU, true);
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/* Program CPU divider for PLL */
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imx233_clkctrl_set_frac_div(CLK_CPU, prof->cpu_fdiv);
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imx233_clkctrl_set_div(CLK_CPU, prof->cpu_idiv);
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/* Change the HBUS divider to its final value */
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imx233_clkctrl_set_div(CLK_HBUS, prof->hbus_div);
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/* Switch back CPU to PLL */
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imx233_clkctrl_set_bypass(CLK_CPU, false);
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/* Change CPU and HBUS frequencies */
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imx233_clkctrl_set_cpu_hbus_div(prof->cpu_idiv, prof->cpu_fdiv, prof->hbus_div);
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/* Set the new EMI frequency */
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imx233_emi_set_frequency(prof->emi_freq);
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}
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else
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{
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/* Switch CPU to crystal at 24MHz */
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imx233_clkctrl_set_bypass(CLK_CPU, true);
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/* Program HBUS divider to its final value */
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imx233_clkctrl_set_div(CLK_HBUS, prof->hbus_div);
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/* Program CPU divider for PLL */
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imx233_clkctrl_set_frac_div(CLK_CPU, prof->cpu_fdiv);
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imx233_clkctrl_set_div(CLK_CPU, prof->cpu_idiv);
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/* Switch back CPU to PLL */
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imx233_clkctrl_set_bypass(CLK_CPU, false);
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/* Change CPU and HBUS frequencies */
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imx233_clkctrl_set_cpu_hbus_div(prof->cpu_idiv, prof->cpu_fdiv, prof->hbus_div);
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/* Set the new EMI frequency */
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imx233_emi_set_frequency(prof->emi_freq);
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/* Change ARM cache timings */
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