i.MX31: Simplify nested interrupt handling. Give SVC mode its own stack by grabbing the FIQ stack that's just been taking up space. Just get rid of all FIQ setup since it isn't used anyway.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30747 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis
parent
0dc76136ca
commit
830531b7d4
4 changed files with 40 additions and 49 deletions
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@ -103,6 +103,7 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void)
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}
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#endif /* 0 */
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#if 0
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/* Accoring to section 9.3.5 of the UM, the AVIC doesn't accelerate
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* fast interrupts and they must be dispatched */
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void __attribute__((naked)) fiq_handler(void)
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@ -115,6 +116,7 @@ void __attribute__((naked)) fiq_handler(void)
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"bx r8 \n" /* jump to FIQ service routine */
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);
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}
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#endif /* 0 */
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void INIT_ATTR avic_init(void)
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{
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@ -77,34 +77,24 @@ static inline void avic_unmask_int(enum IMX31_INT_LIST ints)
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* priority. Avoid using any app or other SVC stack by doing it with a mini
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* "stack on irq stack". Avoid actually enabling IRQ until the routine
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* decides to do so; epilogue code will always disable them again. */
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#define AVIC_NESTED_NI_CALL_PROLOGUE(prio, stacksize) \
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#define AVIC_NESTED_NI_CALL(fn, prio) \
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({ asm volatile ( \
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"sub lr, lr, #4 \n" /* prepare return address */ \
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"srsdb #0x12! \n" /* save LR_irq and SPSR_irq */ \
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"stmfd sp!, { r0-r3, r12 } \n" /* preserve context */ \
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"mov r0, #0x68000000 \n" /* AVIC_BASE_ADDR */ \
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"mov r1, %0 \n" /* load interrupt level */ \
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"ldr r2, [r0, #0x04] \n" /* save NIMASK */ \
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"str r1, [r0, #0x04] \n" /* set interrupt level */ \
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"mov r0, sp \n" /* grab IRQ stack */ \
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"sub sp, sp, %1 \n" /* allocate space for routine to SP_irq */ \
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"cps #0x13 \n" /* change to SVC mode */ \
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"mov r1, sp \n" /* save SP_svc */ \
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"mov sp, r0 \n" /* switch to SP_irq *copy* */ \
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"stmfd sp!, { r1, r2, lr } \n" /* push SP_svc, NIMASK and LR_svc */ \
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: : "i"(prio), "i"(stacksize)); })
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#define AVIC_NESTED_NI_CALL_EPILOGUE(stacksize) \
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({ asm volatile ( \
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"cpsid i \n" /* disable IRQ */ \
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"ldmfd sp!, { r1, r2, lr } \n" /* pop SP_svc, NIMASK and LR_svc */ \
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"mov sp, r1 \n" /* restore SP_svc */ \
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"cps #0x12 \n" /* return to IRQ mode */ \
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"add sp, sp, %0 \n" /* deallocate routine space */ \
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"mov r0, #0x68000000 \n" /* AVIC BASE ADDR */ \
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"str r2, [r0, #0x04] \n" /* restore NIMASK */ \
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"ldmfd sp!, { r0-r3, r12 } \n" /* reload context */ \
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"rfefd sp! \n" /* move stacked SPSR to CPSR, return */ \
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: : "i"(stacksize)); })
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"sub lr, lr, #4 \n" /* prepare return address */ \
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"srsdb #0x12! \n" /* save LR_irq and SPSR_irq */ \
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"stmfd sp!, { r0-r3, r12 } \n" /* preserve context */ \
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"mov r0, #0x68000000 \n" /* AVIC_BASE_ADDR */ \
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"mov r1, %0 \n" /* load interrupt level */ \
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"ldr r2, [r0, #0x04] \n" /* save NIMASK */ \
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"str r1, [r0, #0x04] \n" /* set interrupt level */ \
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"cps #0x13 \n" /* change to SVC mode */ \
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"stmfd sp!, { r2, lr } \n" /* push NIMASK and LR_svc */ \
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"bl " #fn " \n" /* Call SVC routine */ \
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"cpsid i \n" /* disable IRQ */ \
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"ldmfd sp!, { r1, lr } \n" /* pop NIMASK and LR_svc */ \
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"cps #0x12 \n" /* return to IRQ mode */ \
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"mov r0, #0x68000000 \n" /* AVIC BASE ADDR */ \
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"str r1, [r0, #0x04] \n" /* restore NIMASK */ \
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"ldmfd sp!, { r0-r3, r12 } \n" /* reload context */ \
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"rfefd sp! \n" /* move stacked SPSR to CPSR, return */ \
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: : "i"(prio)); })
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#endif /* AVIC_IMX31_H */
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@ -32,8 +32,9 @@ start:
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b prefetch_abort_handler
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b data_abort_handler
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b reserved_handler
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/* These vectors are unused */
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subs pc, lr, #4 @ b irq_handler
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b fiq_handler
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subs pc, lr, #4 @ b fiq_handler
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.balign 0x40, 0x6B
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/* Arm bootloader and startup code based on startup.s from the iPodLinux loader
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@ -80,7 +81,7 @@ remap_start:
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mcrne p15, 0, r0, c7, c7, 0 /* invalidate I cache and D cache */
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mcr p15, 0, r0, c8, c7, 0 /* invalidate TLBs */
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mcr p15, 0, r0, c7, c10, 4 /* Drain the write buffer */
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mcr p15, 0, r0, c13, c0, 0
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mcr p15, 0, r0, c13, c0, 1
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@ -100,7 +101,7 @@ remap_start:
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bic r3, r3, #((1 << 2) | /* L1 D-cache disabled */ \
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(1 << 0)) /* MMU disabled */
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mcr p15, 0, r3, c1, c0, 0
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/*
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* Configure L2 Cache:
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* - 128k size(16k way)
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@ -175,7 +176,7 @@ remap_start:
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mov r0, #0
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mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLB */
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mcr p15, 0, r0, c7, c7, 0 /* Invalidate icache and dcache */
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/* Auxilliary control register */
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mrc p15, 0, r0, c1, c0, 1
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bic r0, r0, #((1 << 6) | /* Restrict cache size OFF */ \
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@ -252,18 +253,18 @@ remap_end:
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cmp r3, r2
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strhi r4, [r2], #4
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bhi 1b
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/* Set up stack for IRQ mode */
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/* Set up stack for IRQ mode */
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msr cpsr_c, #0xd2
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ldr sp, =irq_stack
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/* Set up stack for FIQ mode */
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msr cpsr_c, #0xd1
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ldr sp, =fiq_stack
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/* FIQ mode is unused, thus sp_FIQ is irrelevant for it */
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/* Let svc, abort and undefined modes use irq stack */
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/* Set up stack for SVC mode */
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msr cpsr_c, #0xd3
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ldr sp, =irq_stack
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ldr sp, =svc_stack
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/* Let abort and undefined modes use irq stack */
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msr cpsr_c, #0xd7
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ldr sp, =irq_stack
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msr cpsr_c, #0xdb
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@ -286,7 +287,7 @@ remap_end:
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mrc p15, 0, r3, c1, c0, 2
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orr r3, r3, #0xf00000
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mcr p15, 0, r3, c1, c0, 2
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/* Enable VFP */
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mrc p10, 7, r3, c8, c0, 0
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orr r3, r3, #1<<30
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@ -314,7 +315,7 @@ remap_end:
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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subs pc, lr, #4 @ ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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subs pc, lr, #4 @ ldr pc, [pc, #24]
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.word newstart
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.word undef_instr_handler
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.word software_int_handler
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@ -322,7 +323,7 @@ remap_end:
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.word data_abort_handler
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.word reserved_handler
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.word 0 @ irq_handler
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.word fiq_handler
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.word 0 @ fiq_handler
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#endif /* BOOTLOADER */
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.text
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@ -350,7 +351,7 @@ prefetch_abort_handler:
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b UIE
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data_abort_handler:
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sub r0, lr, #8
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sub r0, lr, #8
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mov r1, #2
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b UIE
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@ -360,8 +361,8 @@ data_abort_handler:
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.space 256*4
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irq_stack:
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/* 256 words of FIQ stack */
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/* 256 words of SVC stack */
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.section .bss
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.balign 32
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.space 256*4
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fiq_stack:
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svc_stack:
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@ -241,9 +241,7 @@ static void __attribute__((used)) dvfs_int(void)
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static __attribute__((naked, interrupt("IRQ"))) void CCM_DVFS_HANDLER(void)
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{
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/* Audio can glitch with the long udelay if nested IRQ isn't allowed. */
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AVIC_NESTED_NI_CALL_PROLOGUE(INT_PRIO_DVFS, 32*4);
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asm volatile ("bl dvfs_int");
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AVIC_NESTED_NI_CALL_EPILOGUE(32*4);
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AVIC_NESTED_NI_CALL(dvfs_int, INT_PRIO_DVFS);
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}
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/* Initialize the DVFS hardware */
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