D2: Reduce binsize a bit by using arrays for the PMU initialisation.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23120 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rob Purchase
parent
e99dd1898e
commit
7cfd418a9b
2 changed files with 90 additions and 56 deletions
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@ -54,15 +54,21 @@ int pcf50606_read_multiple(int address, unsigned char* buf, int count)
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void pcf50606_init(void)
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{
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#ifdef COWON_D2
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/* Set outputs as per OF - further investigation required. */
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pcf50606_write(PCF5060X_DCDEC1, 0xe4);
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pcf50606_write(PCF5060X_IOREGC, 0xf5);
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pcf50606_write(PCF5060X_D1REGC1, 0xf5);
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pcf50606_write(PCF5060X_D2REGC1, 0xe9);
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pcf50606_write(PCF5060X_D3REGC1, 0xf8); /* WM8985 3.3v */
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pcf50606_write(PCF5060X_DCUDC1, 0xe7);
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pcf50606_write(PCF5060X_LPREGC1, 0x0);
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pcf50606_write(PCF5060X_LPREGC2, 0x2);
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/* Set outputs as per OF - further investigation required. */
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static const char init_data[] =
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{PCF5060X_DCDEC1, 0xe4,
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PCF5060X_IOREGC, 0xf5,
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PCF5060X_D1REGC1, 0xf5,
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PCF5060X_D2REGC1, 0xe9,
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PCF5060X_D3REGC1, 0xf8, /* WM8985 3.3v */
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PCF5060X_DCUDC1, 0xe7,
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PCF5060X_LPREGC1, 0x0,
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PCF5060X_LPREGC2, 0x2,
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0};
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const char* ptr;
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for (ptr = init_data; *ptr != 0; ptr += 2)
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pcf50606_write(ptr[0], ptr[1]);
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#endif
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}
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@ -55,56 +55,84 @@ int pcf50635_read_multiple(int address, unsigned char* buf, int count)
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void pcf50635_init(void)
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{
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#ifdef COWON_D2
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/* Configure outputs as per OF */
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pcf50635_write(PCF5063X_REG_DOWN1OUT, 0x13); /* DOWN1 = 1.2V */
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pcf50635_write(PCF5063X_REG_DOWN1CTL, 0x1e); /* DOWN1 DVM step = max */
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pcf50635_write(PCF5063X_REG_DOWN1ENA, 0x1); /* DOWN1 enable */
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pcf50635_write(PCF5063X_REG_DOWN2OUT, 0x2f); /* DOWN2 = 1.8V */
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pcf50635_write(PCF5063X_REG_DOWN2CTL, 0x1e); /* DOWN2 DVM step = max */
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pcf50635_write(PCF5063X_REG_DOWN2ENA, 0x1); /* DOWN2 enable */
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pcf50635_write(PCF5063X_REG_AUTOOUT, 0x5f); /* AUTO = 3.0V */
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pcf50635_write(PCF5063X_REG_AUTOENA, 0x1); /* AUTO enable */
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pcf50635_write(PCF5063X_REG_LDO1OUT, 0x18); /* LDO1 = 3.3V */
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pcf50635_write(PCF5063X_REG_LDO1ENA, 0x1); /* LDO1 enable */
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pcf50635_write(PCF5063X_REG_LDO2OUT, 0x15); /* LDO2 = 3.0V */
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pcf50635_write(PCF5063X_REG_LDO2ENA, 0x1); /* LDO2 enable */
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pcf50635_write(PCF5063X_REG_LDO3ENA, 0x0); /* LDO3 disable */
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pcf50635_write(PCF5063X_REG_LDO4OUT, 0x15); /* LDO4 = 3.0V */
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pcf50635_write(PCF5063X_REG_LDO4ENA, 0x1); /* LDO4 enable */
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pcf50635_write(PCF5063X_REG_LDO5OUT, 0x9); /* LDO5 = 1.8V */
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pcf50635_write(PCF5063X_REG_LDO5ENA, 0x1); /* LDO4 enable */
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pcf50635_write(PCF5063X_REG_LDO6OUT, 0xc); /* LDO6 = 2.1V */
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pcf50635_write(PCF5063X_REG_LDO6ENA, 0x1); /* LDO4 enable */
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pcf50635_write(PCF5063X_REG_HCLDOENA, 0x0); /* HCLDO disable */
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static const char init_data[] =
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{
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/* DOWN1: 1.2V, max DVM step, enabled */
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PCF5063X_REG_DOWN1OUT, 0x13,
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PCF5063X_REG_DOWN1CTL, 0x1e,
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PCF5063X_REG_DOWN1ENA, 0x1,
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/* Configure automatic battery charging as per OF */
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/* DOWN2: 1.8V, max DVM step, enabled */
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PCF5063X_REG_DOWN2OUT, 0x2f,
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PCF5063X_REG_DOWN2CTL, 0x1e,
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PCF5063X_REG_DOWN2ENA, 0x1,
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/* AUTO: 3.0V, enabled */
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PCF5063X_REG_AUTOOUT, 0x5f,
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PCF5063X_REG_AUTOENA, 0x1,
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/* LDO1: 3.3V, enabled */
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PCF5063X_REG_LDO1OUT, 0x18,
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PCF5063X_REG_LDO1ENA, 0x1,
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/* LDO2: 3.0V, enabled */
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PCF5063X_REG_LDO2OUT, 0x15,
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PCF5063X_REG_LDO2ENA, 0x1,
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/* LDO4: 3.0V, enabled */
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PCF5063X_REG_LDO4OUT, 0x15,
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PCF5063X_REG_LDO4ENA, 0x1,
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/* LDO5: 1.8V, enabled */
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PCF5063X_REG_LDO5OUT, 0x9,
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PCF5063X_REG_LDO5ENA, 0x1,
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/* LDO6: 2.1V, enabled */
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PCF5063X_REG_LDO6OUT, 0xc,
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PCF5063X_REG_LDO6ENA, 0x1,
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/* LDO3 and HCLDO disabled */
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PCF5063X_REG_LDO3ENA, 0x0,
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PCF5063X_REG_HCLDOENA, 0x0,
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/* Disable GPIOs */
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PCF5063X_REG_GPIOCTL, 0x0,
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PCF5063X_REG_GPIO1CFG, 0x0,
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PCF5063X_REG_GPIO2CFG, 0x0,
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PCF5063X_REG_GPIO3CFG, 0x0,
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/* IRQ masks (OF values in brackets) */
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PCF5063X_REG_INT1M, 0xff, /* (0x8a enable alarm, usbins, adpins) */
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PCF5063X_REG_INT2M, 0xff, /* (0xff all masked) */
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PCF5063X_REG_INT3M, 0xff, /* (0x7f enable onkey1s) */
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PCF5063X_REG_INT4M, 0xff, /* (0xfd enable lowbat) */
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PCF5063X_REG_INT5M, 0xff, /* (0xff all masked) */
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/* Wakeup mode */
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PCF5063X_REG_OOCMODE, 0x0, /* onkey falling edge */
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PCF5063X_REG_OOCCTL, 0x2, /* actphrst = phase 3 */
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PCF5063X_REG_OOCWAKE, 0xc1, /* wakeup on adapter, usb, onkey */
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/* Configure battery charger as per OF */
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PCF5063X_REG_MBCC2, 0xa8, /* Vmax = 4.2V, Vbatcond = 2.7V, long debounce */
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PCF5063X_REG_MBCC3, 0x2a, /* precharge level = 16% */
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PCF5063X_REG_MBCC4, 0x94, /* fastcharge level = 58% */
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PCF5063X_REG_MBCC5, 0xff, /* fastcharge level (usb) = 100% */
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PCF5063X_REG_MBCC6, 0x4, /* cutoff level = 12.5% */
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PCF5063X_REG_MBCC7, 0xc1, /* bat-sysImax = 2.2A, USB = 500mA */
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PCF5063X_REG_BVMCTL, 0xe, /* batok level = 3.4V */
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/* end marker */
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0};
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const char* ptr;
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for (ptr = init_data; *ptr != 0; ptr += 2)
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pcf50635_write(ptr[0], ptr[1]);
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/* Enable automatic charging, preserving default values */
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pcf50635_write(PCF5063X_REG_MBCC1,
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pcf50635_read(PCF5063X_REG_MBCC1) | 7); /* auto charge termination & resume */
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pcf50635_write(PCF5063X_REG_MBCC2, 0xa8); /* Vmax = 4.2V, Vbatcond = 2.7V, long debounce */
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pcf50635_write(PCF5063X_REG_MBCC3, 0x2a); /* precharge level = 16% */
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pcf50635_write(PCF5063X_REG_MBCC4, 0x94); /* fastcharge level = 58% */
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pcf50635_write(PCF5063X_REG_MBCC5, 0xff); /* fastcharge level (usb) = 100% */
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pcf50635_write(PCF5063X_REG_MBCC6, 0x4); /* cutoff level = 12.5% */
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pcf50635_write(PCF5063X_REG_MBCC7, 0xc1); /* bat-sysimax = 2.2A, USB = 500mA */
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pcf50635_write(PCF5063X_REG_BVMCTL, 0xe); /* batok level = 3.4V */
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pcf50635_read(PCF5063X_REG_MBCC1) | 7);
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/* IRQ masks */
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pcf50635_write(PCF5063X_REG_INT1M, 0x8a); /* enable alarm, usbins, adpins */
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pcf50635_write(PCF5063X_REG_INT2M, 0xff); /* mask all */
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pcf50635_write(PCF5063X_REG_INT3M, 0x7f); /* enable onkey1s */
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pcf50635_write(PCF5063X_REG_INT4M, 0xfd); /* enable lowbat */
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pcf50635_write(PCF5063X_REG_INT5M, 0xff); /* mask all */
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pcf50635_write(PCF5063X_REG_OOCMODE, 0x0);
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pcf50635_write(PCF5063X_REG_OOCCTL, 0x2); /* actphrst = phase 3 */
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pcf50635_write(PCF5063X_REG_OOCWAKE, /* adapter, usb, (rtc) wake */
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(pcf50635_read(PCF5063X_REG_OOCWAKE) & 0x10) | 0xc1);
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/* We don't care about the GPIOs, disable them */
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pcf50635_write(PCF5063X_REG_GPIOCTL, 0x0);
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pcf50635_write(PCF5063X_REG_GPIO1CFG, 0x0);
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pcf50635_write(PCF5063X_REG_GPIO2CFG, 0x0);
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pcf50635_write(PCF5063X_REG_GPIO3CFG, 0x0);
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#endif
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}
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