regtools/qeditor: enhance backend write with write mode (SCT)
Change-Id: I723bce7a60fb08c1d1d5f894a225c36bc1ba4394
This commit is contained in:
parent
68163e8f49
commit
6e132b48d5
2 changed files with 56 additions and 17 deletions
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@ -106,11 +106,17 @@ bool FileIoBackend::Reload()
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return true;
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}
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bool FileIoBackend::WriteRegister(const QString& name, soc_word_t value)
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bool FileIoBackend::WriteRegister(const QString& name, soc_word_t value, WriteMode mode)
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{
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m_dirty = true;
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m_map[name] = value;
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return true;
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switch(mode)
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{
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case Write: m_map[name] = value; return true;
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case Set: m_map[name] |= value; return true;
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case Clear: m_map[name] &= ~value; return true;
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case Toggle: m_map[name] ^= value; return true;
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default: return false;
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}
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}
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bool FileIoBackend::Commit()
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@ -281,8 +287,15 @@ bool HWStubIoBackend::ReadRegister(soc_addr_t addr, soc_word_t& value)
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return m_dev->ReadMem(addr, sizeof(value), &value);
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}
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bool HWStubIoBackend:: WriteRegister(soc_addr_t addr, soc_word_t value)
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bool HWStubIoBackend::WriteRegister(soc_addr_t addr, soc_word_t value, WriteMode mode)
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{
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switch(mode)
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{
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case Set: addr += 4; break;
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case Clear: addr += 8; break;
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case Toggle: addr += 12; break;
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default: break;
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}
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return m_dev->WriteMem(addr, sizeof(value), &value);
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}
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@ -387,6 +400,19 @@ bool BackendHelper::ReadRegister(const QString& dev, const QString& reg, soc_wor
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return false;
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}
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bool BackendHelper::WriteRegister(const QString& dev, const QString& reg,
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soc_word_t v, IoBackend::WriteMode mode)
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{
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if(m_io_backend->SupportAccess(IoBackend::ByName))
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return m_io_backend->WriteRegister("HW." + dev + "." + reg, v, mode);
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if(m_io_backend->SupportAccess(IoBackend::ByAddress))
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{
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soc_addr_t addr;
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if(GetRegisterAddress(dev, reg, addr))
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return m_io_backend->WriteRegister(addr, v, mode);
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}
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return false;
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}
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bool BackendHelper::GetDevRef(const QString& sdev, SocDevRef& ref)
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{
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@ -456,4 +482,4 @@ bool BackendHelper::ReadRegisterField(const QString& dev, const QString& reg,
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return false;
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v = (v & field_ref.GetField().bitmask()) >> field_ref.GetField().first_bit;
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return true;
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}
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}
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@ -17,12 +17,21 @@ public:
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IoBackend() {}
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virtual ~IoBackend() {}
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enum WriteMode
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{
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Write, Set, Clear, Toggle
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};
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enum AccessType
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{
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ByName,
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ByAddress,
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};
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/** Register naming convention: name based access are of the form:
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* HW.dev.reg
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* where <dev> is the device name (including index like APPUART1)
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* and <reg> is the register name (including index like PRIORITY29) */
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/* report whether backend supports register access type */
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virtual bool SupportAccess(AccessType type) = 0;
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/* get SoC name */
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@ -37,8 +46,10 @@ public:
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/* write a register by name or address
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* NOTE: even on a read-only backend, a write is allowed be successful as long
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* as commit fails */
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virtual bool WriteRegister(const QString& name, soc_word_t value) = 0;
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value) = 0;
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virtual bool WriteRegister(const QString& name, soc_word_t value,
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WriteMode mode = Write) = 0;
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value,
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WriteMode mode = Write) = 0;
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/* check whether backend contains uncommitted (ie cached) writes */
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virtual bool IsDirty() = 0;
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/* commit all writes */
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@ -59,10 +70,10 @@ public:
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{ (void) addr; (void) value; return false; }
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virtual bool Reload() { return false; }
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virtual bool IsReadOnly() { return true; }
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virtual bool WriteRegister(const QString& name, soc_word_t value)
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{ (void) name; (void) value; return false; }
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value)
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{ (void) addr; (void) value; return false; }
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virtual bool WriteRegister(const QString& name, soc_word_t value, WriteMode mode)
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{ (void) name; (void) value; (void) mode; return false; }
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value, WriteMode mode)
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{ (void) addr; (void) value; (void) mode; return false; }
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virtual bool IsDirty() { return false; }
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virtual bool Commit() { return false; }
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};
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@ -82,9 +93,9 @@ public:
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{ (void) addr; (void) value; return false; }
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virtual bool Reload();
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virtual bool IsReadOnly() { return m_readonly; }
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virtual bool WriteRegister(const QString& name, soc_word_t value);
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value)
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{ (void) addr; (void) value; return false; }
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virtual bool WriteRegister(const QString& name, soc_word_t value, WriteMode mode);
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value, WriteMode mode)
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{ (void) addr; (void) value; (void) mode; return false; }
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virtual bool IsDirty() { return m_dirty; }
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virtual bool Commit();
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@ -142,9 +153,9 @@ public:
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virtual bool ReadRegister(soc_addr_t addr, soc_word_t& value);
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virtual bool Reload();
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virtual bool IsReadOnly() { return false; }
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virtual bool WriteRegister(const QString& name, soc_word_t value)
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{ (void) name; (void) value; return false; }
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value);
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virtual bool WriteRegister(const QString& name, soc_word_t value, WriteMode mode)
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{ (void) name; (void) value; (void) mode; return false; }
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virtual bool WriteRegister(soc_addr_t addr, soc_word_t value, WriteMode mode);
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virtual bool IsDirty() { return false; }
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virtual bool Commit() { return true; }
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@ -258,6 +269,8 @@ public:
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bool ReadRegister(const QString& dev, const QString& reg, soc_word_t& v);
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bool ReadRegisterField(const QString& dev, const QString& reg,
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const QString& field, soc_word_t& v);
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bool WriteRegister(const QString& dev, const QString& reg, soc_word_t v,
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IoBackend::WriteMode mode = IoBackend::Write);
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bool GetDevRef(const QString& dev, SocDevRef& ref);
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bool GetRegRef(const SocDevRef& dev, const QString& reg, SocRegRef& ref);
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bool GetFieldRef(const SocRegRef& reg, const QString& field, SocFieldRef& ref);
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