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Update the LV24020 FM driver so that it can be used on the D2. Register read/write and chip_id detection works now.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17703 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rob Purchase 2008-06-07 19:23:57 +00:00
parent 2a4c0f5cb2
commit 51d6d4054f
1 changed files with 32 additions and 15 deletions
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47
firmware/drivers/tuner/lv24020lp.c
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@ -58,10 +58,25 @@ static int fd_log = -1;
/** tuner register defines **/ /** tuner register defines **/
/* pins on GPIOH port */ #if defined(SANSA_E200) || defined(SANSA_C200)
#define GPIO_OUTPUT_EN GPIOH_OUTPUT_EN
#define GPIO_OUTPUT_VAL GPIOH_OUTPUT_VAL
#define GPIO_INPUT_VAL GPIOH_INPUT_VAL
#define FM_NRW_PIN 3 #define FM_NRW_PIN 3
#define FM_CLOCK_PIN 4 #define FM_CLOCK_PIN 4
#define FM_DATA_PIN 5 #define FM_DATA_PIN 5
#elif defined(COWON_D2)
#define GPIO_OUTPUT_EN GPIOC_DIR
#define GPIO_OUTPUT_VAL GPIOC
#define GPIO_INPUT_VAL GPIOC
#define FM_NRW_PIN 31
#define FM_CLOCK_PIN 29
#define FM_DATA_PIN 30
#define udelay(x) /* Remove hack when D2 has udelay */
#else
#error GPIOs undefined for this target
#endif
#define FM_CLK_DELAY 1 #define FM_CLK_DELAY 1
/* block 1 registers */ /* block 1 registers */
@ -258,17 +273,18 @@ static void lv24020lp_send_byte(unsigned int byte)
{ {
int i; int i;
byte <<= FM_DATA_PIN;
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
{ {
GPIOH_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN);
if (byte & 1)
GPIO_OUTPUT_VAL |= (1 << FM_DATA_PIN);
else
GPIO_OUTPUT_VAL &= ~(1 << FM_DATA_PIN);
GPIOH_OUTPUT_VAL = (GPIOH_OUTPUT_VAL & ~(1 << FM_DATA_PIN)) |
(byte & (1 << FM_DATA_PIN));
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
GPIOH_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
byte >>= 1; byte >>= 1;
@ -279,8 +295,8 @@ static void lv24020lp_send_byte(unsigned int byte)
static void lv24020lp_end_write(void) static void lv24020lp_end_write(void)
{ {
/* switch back to read mode */ /* switch back to read mode */
GPIOH_OUTPUT_EN &= ~(1 << FM_DATA_PIN); GPIO_OUTPUT_EN &= ~(1 << FM_DATA_PIN);
GPIOH_OUTPUT_VAL &= ~(1 << FM_NRW_PIN); GPIO_OUTPUT_VAL &= ~(1 << FM_NRW_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
} }
@ -294,8 +310,8 @@ static unsigned int lv24020lp_begin_write(unsigned int address)
for (;;) for (;;)
{ {
/* Prepare 3-wire bus pins for write cycle */ /* Prepare 3-wire bus pins for write cycle */
GPIOH_OUTPUT_VAL |= (1 << FM_NRW_PIN); GPIO_OUTPUT_VAL |= (1 << FM_NRW_PIN);
GPIOH_OUTPUT_EN |= (1 << FM_DATA_PIN); GPIO_OUTPUT_EN |= (1 << FM_DATA_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
/* current block == register block? */ /* current block == register block? */
@ -386,16 +402,17 @@ static unsigned int lv24020lp_read(unsigned int address)
toread = 0; toread = 0;
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
{ {
GPIOH_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
toread |= (GPIOH_INPUT_VAL & (1 << FM_DATA_PIN)) << i; if (GPIO_INPUT_VAL & (1 << FM_DATA_PIN))
toread |= (1 << i);
GPIOH_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
} }
return toread >> FM_DATA_PIN; return toread;
} }
/* enables auto frequency centering */ /* enables auto frequency centering */