M:Robe 500: Use bit modifiers more.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29247 a1c6a512-1295-4272-9138-f99709370657
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a014191e5e
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4d12904439
4 changed files with 28 additions and 20 deletions
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@ -64,10 +64,10 @@ void dsp_reset(void)
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{
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DSP_(0x7fff) = 0xdead;
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IO_DSPC_HPIB_CONTROL &= ~(1 << 8);
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bitclr16(&IO_DSPC_HPIB_CONTROL, 1 << 8);
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/* HPIB bus cycles will lock up the ARM in here. Don't touch DSP RAM. */
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 8;
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bitset16(&IO_DSPC_HPIB_CONTROL, 1 << 8);
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/* TODO: Timeout. */
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while (DSP_(0x7fff) != 0);
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@ -81,9 +81,9 @@ void dsp_wake(void)
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/* The first time you INT0 the DSP, the ROM loader will branch to your RST
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handler. Subsequent times, your INT0 handler will get executed. */
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IO_DSPC_HPIB_CONTROL &= ~(1 << 7);
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bitclr16(&IO_DSPC_HPIB_CONTROL, 1 << 7);
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 7;
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bitset16(&IO_DSPC_HPIB_CONTROL, 1 << 7);
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restore_irq(old_level);
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}
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@ -27,7 +27,7 @@
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void tick_start(unsigned int interval_in_ms)
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{
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IO_CLK_MOD2 |= CLK_MOD2_TMR1; /* enable TIMER1 clock */
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bitset16(&IO_CLK_MOD2, CLK_MOD2_TMR1); /* enable TIMER1 clock */
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IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP;
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/* Setup the Prescalar (Divide by 10)
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@ -42,7 +42,7 @@ void tick_start(unsigned int interval_in_ms)
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IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_FREE_RUN;
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/* Enable the interrupt */
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IO_INTC_EINT0 |= INTR_EINT0_TMR1;
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bitset16(&IO_INTC_EINT0, INTR_EINT0_TMR1);
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}
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void TIMER1(void) __attribute__ ((section(".icode")));
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@ -45,7 +45,7 @@ bool timer_set(long cycles, bool start)
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oldlevel = set_irq_level(HIGHEST_IRQ_LEVEL);
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IO_CLK_MOD2 |= CLK_MOD2_TMR0; //enable TIMER0 clock!!!!!!!!!
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bitset16(&IO_CLK_MOD2, CLK_MOD2_TMR0); /* enable TIMER0 clock */
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IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
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@ -74,13 +74,16 @@ bool timer_set(long cycles, bool start)
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static void stop_timer(void)
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{
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IO_INTC_EINT0 &= ~INTR_EINT0_TMR0; //disable TIMER0 interrupt
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/* disable TIMER0 interrupt */
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bitclr16(&IO_INTC_EINT0, INTR_EINT0_TMR0);
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IO_INTC_IRQ0 = INTR_IRQ0_TMR0; //clear TIMER0 interrupt
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/* clear TIMER0 interrupt */
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IO_INTC_IRQ0 = INTR_IRQ0_TMR0;
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IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
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IO_CLK_MOD2 &= ~CLK_MOD2_TMR0; //disable TIMER0 clock
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/* disable TIMER0 clock */
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bitclr16(&IO_CLK_MOD2, CLK_MOD2_TMR0);
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}
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bool timer_start(void)
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@ -89,12 +92,14 @@ bool timer_start(void)
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stop_timer();
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IO_CLK_MOD2 |= CLK_MOD2_TMR0; //enable TIMER0 clock!!!!!!!!!
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/* enable TIMER0 clock */
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bitset16(&IO_CLK_MOD2, CLK_MOD2_TMR0);
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/* Turn Timer0 to Free Run mode */
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IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN;
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IO_INTC_EINT0 |= INTR_EINT0_TMR0; //enable TIMER0 interrupt
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/* enable TIMER0 interrupt */
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bitset16(&IO_INTC_EINT0, INTR_EINT0_TMR0);
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restore_interrupt(oldstatus);
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@ -39,7 +39,7 @@ static volatile int uart1_receive_count, uart1_receive_read, uart1_receive_write
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void uart_init(void)
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{
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/* Enable UART clock */
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IO_CLK_MOD2 |= CLK_MOD2_UART1;
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bitset16(&IO_CLK_MOD2, CLK_MOD2_UART1);
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// 8-N-1
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IO_UART1_MSR = 0xC400;
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@ -58,7 +58,7 @@ void uart_init(void)
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uart1_send_write=0;
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/* Enable the interrupt */
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IO_INTC_EINT0 |= INTR_EINT0_UART1;
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bitset16(&IO_INTC_EINT0, INTR_EINT0_UART1);
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}
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/* This function is not interrupt driven */
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@ -85,7 +85,7 @@ void uart1_puts(const char *str, int size)
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memcpy(uart1_send_buffer_ring, str, size);
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/* Disable interrupt while modifying the pointers */
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IO_INTC_EINT0 &= ~INTR_EINT0_UART1;
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bitclr16(&IO_INTC_EINT0, INTR_EINT0_UART1);
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uart1_send_count=size;
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uart1_send_read=0;
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@ -98,25 +98,27 @@ void uart1_puts(const char *str, int size)
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}
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/* Enable interrupt */
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IO_INTC_EINT0 |= INTR_EINT0_UART1;
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bitset16(&IO_INTC_EINT0, INTR_EINT0_UART1);
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}
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void uart1_clear_queue(void)
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{
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/* Disable interrupt while modifying the pointers */
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IO_INTC_EINT0 &= ~INTR_EINT0_UART1;
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bitclr16(&IO_INTC_EINT0, INTR_EINT0_UART1);
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uart1_receive_write=0;
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uart1_receive_count=0;
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uart1_receive_read=0;
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/* Enable interrupt */
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IO_INTC_EINT0 |= INTR_EINT0_UART1;
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bitset16(&IO_INTC_EINT0, INTR_EINT0_UART1);
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}
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/* This function returns the number of bytes left in the queue after a read is done (negative if fail)*/
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int uart1_gets_queue(char *str, int size)
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{
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/* Disable the interrupt while modifying the pointers */
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IO_INTC_EINT0 &= ~INTR_EINT0_UART1;
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bitclr16(&IO_INTC_EINT0, INTR_EINT0_UART1);
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int retval;
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if(uart1_receive_count<size)
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@ -146,7 +148,7 @@ int uart1_gets_queue(char *str, int size)
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}
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/* Enable the interrupt */
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IO_INTC_EINT0 |= INTR_EINT0_UART1;
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bitset16(&IO_INTC_EINT0, INTR_EINT0_UART1);
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return retval;
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}
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@ -176,3 +178,4 @@ void UART1(void)
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uart1_send_count--;
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}
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}
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