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x1000: tweak USB fifo sizes

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The old sizes limited the number of usable endpoints and were
unnecessarily large.

Change-Id: Ia17d3b62ecc40c8ca289d78f2275c7842c09deed
This commit is contained in:
Aidan MacDonald 2021-10-05 22:19:52 +01:00
parent 67d4da5342
commit 4be81c2385
1 changed files with 7 additions and 4 deletions
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11
firmware/target/mips/ingenic_x1000/usb-x1000.c
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@ -35,10 +35,13 @@
const struct usb_dw_config usb_dw_config = {
.phytype = DWC_PHYTYPE_UTMI_16,
/* Available FIFO memory: 3576 words */
.rx_fifosz = 1024,
.nptx_fifosz = 128, /* 1 dedicated FIFO for EP0 */
.ptx_fifosz = 768, /* 3 dedicated FIFOs */
/* Available FIFO memory: 3576 words
* Number of endpoints: 9
* Max packet size: 512 bytes
*/
.rx_fifosz = 816, /* shared RxFIFO */
.nptx_fifosz = 32, /* only used for EP0 IN */
.ptx_fifosz = 384, /* room for 7 IN EPs */
#ifndef USB_DW_ARCH_SLAVE
.ahb_burst_len = HBSTLEN_INCR16,