Add register bit defines for as3514 and clean stuff up. Reduce poppiness at startup and shutdown (and even powerup for e200). Really, I can't honestly say it will help anything but an e200v1 but I'm sick of the noises. ;)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19214 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis
parent
2b39cb4b77
commit
3511d94031
5 changed files with 298 additions and 114 deletions
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@ -49,11 +49,12 @@ const struct sound_settings_info audiohw_settings[] = {
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/* Shadow registers */
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static struct as3514_info
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{
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int vol_r; /* Cached volume level (R) */
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int vol_l; /* Cached volume level (L) */
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unsigned int regs[0x1e]; /* last audio register: PLLMODE 0x1d */
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int vol_r; /* Cached volume level (R) */
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int vol_l; /* Cached volume level (L) */
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uint8_t regs[AS3514_NUM_AUDIO_REGS]; /* 8-bit registers */
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} as3514;
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/* In order to keep track of source for combining volume ranges */
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enum
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{
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SOURCE_DAC = 0,
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@ -87,14 +88,20 @@ static void as3514_write(unsigned int reg, unsigned int value)
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}
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/* Helpers to set/clear bits */
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static void as3514_write_or(unsigned int reg, unsigned int bits)
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static void as3514_set(unsigned int reg, unsigned int bits)
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{
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as3514_write(reg, as3514.regs[reg] | bits);
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}
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static void as3514_write_and(unsigned int reg, unsigned int bits)
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static void as3514_clear(unsigned int reg, unsigned int bits)
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{
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as3514_write(reg, as3514.regs[reg] & bits);
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as3514_write(reg, as3514.regs[reg] & ~bits);
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}
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static void as3514_write_masked(unsigned int reg, unsigned int bits,
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unsigned int mask)
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{
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as3514_write(reg, (as3514.regs[reg] & ~mask) | (bits & mask));
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}
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/* convert tenth of dB volume to master volume register value */
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@ -139,63 +146,66 @@ void audiohw_preinit(void)
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{
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unsigned int i;
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/* Set ADC off, mixer on, DAC on, line out off, line in off, mic off */
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/* Turn on SUM, DAC */
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as3514_write(AS3514_AUDIOSET1, (1 << 6) | (1 << 5));
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/* Set BIAS on, DITH on, AGC on, IBR_DAC max, LSP_LP on, IBR_LSP min */
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as3514_write(AS3514_AUDIOSET2, (1 << 2) | (3 << 0));
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/* Set HPCM off, ZCU off*/
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as3514_write(AS3514_AUDIOSET3, (1 << 2) | (1 << 0));
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/* Mute and disable speaker */
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as3514_write(AS3514_LSP_OUT_R, 0);
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as3514_write(AS3514_LSP_OUT_L, (1 << 7));
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/* set vol and set headphone over-current to 0 */
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as3514_write(AS3514_HPH_OUT_R, (0x3 << 6) | 0x16);
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/* set default vol for headphone */
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as3514_write(AS3514_HPH_OUT_L, 0x16);
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/* LRCK 24-48kHz */
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as3514_write(AS3514_PLLMODE, 0x00);
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/* DAC_Mute_off */
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as3514_write_or(AS3514_DAC_L, (1 << 6));
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/* M1_Sup_off */
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as3514_write_or(AS3514_MIC1_L, (1 << 7));
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/* M2_Sup_off */
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as3514_write_or(AS3514_MIC2_L, (1 << 7));
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/* read all reg values */
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for (i = 0; i < ARRAYLEN(as3514.regs); i++)
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{
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as3514.regs[i] = ascodec_read(i);
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}
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/* Set ADC off, mixer on, DAC on, line out off, line in off, mic off */
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/* Turn on SUM, DAC */
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as3514_write(AS3514_AUDIOSET1, AUDIOSET1_DAC_on | AUDIOSET1_SUM_on);
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/* Set BIAS on, DITH on, AGC on, IBR_DAC max, LSP_LP on, IBR_LSP min */
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as3514_write(AS3514_AUDIOSET2,
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AUDIOSET2_IBR_DAC_0 | AUDIOSET2_LSP_LP |
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AUDIOSET2_IBR_LSP_50);
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/* Set HPCM on, ZCU on */
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as3514_write(AS3514_AUDIOSET3, 0);
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/* Mute and disable speaker */
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as3514_write(AS3514_LSP_OUT_R, LSP_OUT_R_SP_OVC_TO_256MS | 0x00);
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as3514_write(AS3514_LSP_OUT_L, LSP_OUT_L_SP_MUTE | 0x00);
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/* Set headphone over-current to 0, Min volume */
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as3514_write(AS3514_HPH_OUT_R,
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HPH_OUT_R_HP_OVC_TO_0MS | 0x00);
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/* Headphone ON, MUTE, Min volume */
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as3514_write(AS3514_HPH_OUT_L,
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HPH_OUT_L_HP_ON | HPH_OUT_L_HP_MUTE | 0x00);
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/* LRCK 24-48kHz */
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as3514_write(AS3514_PLLMODE, PLLMODE_LRCK_24_48);
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/* DAC_Mute_off */
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as3514_set(AS3514_DAC_L, DAC_L_DAC_MUTE_off);
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/* M1_Sup_off */
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as3514_set(AS3514_MIC1_L, MIC1_L_M1_SUP_off);
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/* M2_Sup_off */
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as3514_set(AS3514_MIC2_L, MIC2_L_M2_SUP_off);
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}
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/* Silently enable / disable audio output */
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void audiohw_enable_output(bool enable)
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void audiohw_postinit(void)
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{
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if (enable) {
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/* reset the I2S controller into known state */
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i2s_reset();
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/* wait until outputs have stabilized */
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sleep(HZ/4);
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as3514_write_or(AS3514_HPH_OUT_L, (1 << 6)); /* power on */
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audiohw_mute(0);
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} else {
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audiohw_mute(1);
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as3514_write_and(AS3514_HPH_OUT_L, ~(1 << 6)); /* power off */
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}
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as3514_write(AS3514_AUDIOSET3, AUDIOSET3_HPCM_off);
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#ifdef CPU_PP
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ascodec_supressor_on(false);
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#endif
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audiohw_mute(false);
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}
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void audiohw_set_master_vol(int vol_l, int vol_r)
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{
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unsigned int hph_r = as3514.regs[AS3514_HPH_OUT_R] & ~0x1f;
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unsigned int hph_l = as3514.regs[AS3514_HPH_OUT_L] & ~0x1f;
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unsigned int hph_r, hph_l;
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unsigned int mix_l, mix_r;
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unsigned int mix_reg_r, mix_reg_l;
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@ -211,45 +221,44 @@ void audiohw_set_master_vol(int vol_l, int vol_r)
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mix_reg_l = AS3514_DAC_L;
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}
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mix_r = as3514.regs[mix_reg_r] & ~0x1f;
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mix_l = as3514.regs[mix_reg_l] & ~0x1f;
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/* we combine the mixer channel volume range with the headphone volume
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range */
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/* We combine the mixer channel volume range with the headphone volume
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range - keep first stage as loud as possible */
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if (vol_r <= 0x16) {
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mix_r |= vol_r;
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/* hph_r - set 0 */
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mix_r = vol_r;
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hph_r = 0;
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} else {
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mix_r |= 0x16;
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hph_r += vol_r - 0x16;
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mix_r = 0x16;
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hph_r = vol_r - 0x16;
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}
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if (vol_l <= 0x16) {
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mix_l |= vol_l;
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/* hph_l - set 0 */
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mix_l = vol_l;
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hph_l = 0;
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} else {
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mix_l |= 0x16;
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hph_l += vol_l - 0x16;
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mix_l = 0x16;
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hph_l = vol_l - 0x16;
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}
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as3514_write(mix_reg_r, mix_r);
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as3514_write(mix_reg_l, mix_l);
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as3514_write(AS3514_HPH_OUT_R, hph_r);
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as3514_write(AS3514_HPH_OUT_L, hph_l);
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as3514_write_masked(mix_reg_r, mix_r, AS3514_VOL_MASK);
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as3514_write_masked(mix_reg_l, mix_l, AS3514_VOL_MASK);
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as3514_write_masked(AS3514_HPH_OUT_R, hph_r, AS3514_VOL_MASK);
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as3514_write_masked(AS3514_HPH_OUT_L, hph_l, AS3514_VOL_MASK);
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}
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void audiohw_set_lineout_vol(int vol_l, int vol_r)
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{
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as3514_write(AS3514_LINE_OUT_R, vol_r);
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as3514_write(AS3514_LINE_OUT_L, (1 << 6) | vol_l);
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as3514_write_masked(AS3514_LINE_OUT_R, vol_r,
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AS3514_VOL_MASK);
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as3514_write_masked(AS3514_LINE_OUT_L, vol_l,
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AS3514_VOL_MASK);
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}
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void audiohw_mute(bool mute)
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{
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if (mute) {
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as3514_write_or(AS3514_HPH_OUT_L, (1 << 7));
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as3514_set(AS3514_HPH_OUT_L, HPH_OUT_L_HP_MUTE);
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} else {
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as3514_write_and(AS3514_HPH_OUT_L, ~(1 << 7));
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as3514_clear(AS3514_HPH_OUT_L, HPH_OUT_L_HP_MUTE);
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}
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}
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@ -259,8 +268,19 @@ void audiohw_close(void)
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/* mute headphones */
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audiohw_mute(true);
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#ifdef CPU_PP
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ascodec_supressor_on(true);
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#endif
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/* turn on common */
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as3514_clear(AS3514_AUDIOSET3, AUDIOSET3_HPCM_off);
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/* turn off everything */
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as3514_clear(AS3514_HPH_OUT_L, HPH_OUT_L_HP_ON);
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as3514_write(AS3514_AUDIOSET1, 0x0);
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/* Allow caps to discharge */
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sleep(HZ/4);
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}
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void audiohw_set_sample_rate(int sampling_control)
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@ -278,29 +298,32 @@ void audiohw_enable_recording(bool source_mic)
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audiohw_set_master_vol(as3514.vol_l, as3514.vol_r);
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/* ADCmux = Stereo Microphone */
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as3514_write_and(AS3514_ADC_R, ~(0x3 << 6));
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as3514_write_masked(AS3514_ADC_R, ADC_R_ADCMUX_ST_MIC,
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ADC_R_ADCMUX);
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/* MIC1_on, LIN1_off */
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as3514_write(AS3514_AUDIOSET1,
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(as3514.regs[AS3514_AUDIOSET1] & ~(1 << 2)) | (1 << 0));
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as3514_write_masked(AS3514_AUDIOSET1, AUDIOSET1_MIC1_on,
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AUDIOSET1_MIC1_on | AUDIOSET1_LIN1_on);
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/* M1_AGC_off */
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as3514_write_and(AS3514_MIC1_R, ~(1 << 7));
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as3514_clear(AS3514_MIC1_R, MIC1_R_M1_AGC_off);
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} else {
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source = SOURCE_LINE_IN1;
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audiohw_set_master_vol(as3514.vol_l, as3514.vol_r);
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/* ADCmux = Line_IN1 */
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as3514_write(AS3514_ADC_R,
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(as3514.regs[AS3514_ADC_R] & ~(0x3 << 6)) | (0x1 << 6));
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as3514_write_masked(AS3514_ADC_R, ADC_R_ADCMUX_LINE_IN1,
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ADC_R_ADCMUX);
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/* MIC1_off, LIN1_on */
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as3514_write(AS3514_AUDIOSET1,
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(as3514.regs[AS3514_AUDIOSET1] & ~(1 << 0)) | (1 << 2));
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as3514_write_masked(AS3514_AUDIOSET1, AUDIOSET1_LIN1_on,
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AUDIOSET1_MIC1_on | AUDIOSET1_LIN1_on);
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}
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/* ADC_Mute_off */
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as3514_write_or(AS3514_ADC_L, (1 << 6));
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as3514_set(AS3514_ADC_L, ADC_L_ADC_MUTE_off);
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/* ADC_on */
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as3514_write_or(AS3514_AUDIOSET1, (1 << 7));
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as3514_set(AS3514_AUDIOSET1, AUDIOSET1_ADC_on);
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}
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void audiohw_disable_recording(void)
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@ -308,10 +331,12 @@ void audiohw_disable_recording(void)
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source = SOURCE_DAC;
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/* ADC_Mute_on */
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as3514_write_and(AS3514_ADC_L, ~(1 << 6));
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as3514_clear(AS3514_ADC_L, ADC_L_ADC_MUTE_off);
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/* ADC_off, LIN1_off, MIC_off */
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as3514_write_and(AS3514_AUDIOSET1, ~((1 << 7) | (1 << 2) | (1 << 0)));
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as3514_clear(AS3514_AUDIOSET1,
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AUDIOSET1_ADC_on | AUDIOSET1_LIN1_on |
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AUDIOSET1_MIC1_on);
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audiohw_set_master_vol(as3514.vol_l, as3514.vol_r);
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}
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@ -332,25 +357,27 @@ void audiohw_set_recvol(int left, int right, int type)
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case AUDIO_GAIN_MIC:
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{
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/* Combine MIC gains seamlessly with ADC levels */
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unsigned int mic1_r = as3514.regs[AS3514_MIC1_R] & ~(0x3 << 5);
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unsigned int mic1_r;
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if (left >= 36) {
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/* M1_Gain = +40db, ADR_Vol = +7.5dB .. +12.0 dB =>
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+19.5 dB .. +24.0 dB */
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left -= 8;
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mic1_r |= (0x2 << 5);
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mic1_r = MIC1_R_M1_GAIN_40DB;
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} else if (left >= 32) {
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/* M1_Gain = +34db, ADR_Vol = +7.5dB .. +12.0 dB =>
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+13.5 dB .. +18.0 dB */
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left -= 4;
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mic1_r |= (0x1 << 5);
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}
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mic1_r = MIC1_R_M1_GAIN_34DB;
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} else {
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/* M1_Gain = +28db, ADR_Vol = -34.5dB .. +12.0 dB =>
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-34.5 dB .. +12.0 dB */
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mic1_r = MIC1_R_M1_GAIN_28DB;
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}
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right = left;
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as3514_write(AS3514_MIC1_R, mic1_r);
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as3514_write_masked(AS3514_MIC1_R, mic1_r, MIC1_R_M1_GAIN);
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break;
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}
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case AUDIO_GAIN_LINEIN:
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@ -359,8 +386,8 @@ void audiohw_set_recvol(int left, int right, int type)
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return;
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}
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as3514_write(AS3514_ADC_R, (as3514.regs[AS3514_ADC_R] & ~0x1f) | right);
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as3514_write(AS3514_ADC_L, (as3514.regs[AS3514_ADC_L] & ~0x1f) | left);
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as3514_write_masked(AS3514_ADC_R, right, AS3514_VOL_MASK);
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as3514_write_masked(AS3514_ADC_L, left, AS3514_VOL_MASK);
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}
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/**
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@ -369,27 +396,18 @@ void audiohw_set_recvol(int left, int right, int type)
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*/
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void audiohw_set_monitor(bool enable)
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{
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/* LI1R_Mute_on - default */
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unsigned int line_in1_r = as3514.regs[AS3514_LINE_IN1_R] & ~(1 << 5);
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/* LI1L_Mute_on - default */
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unsigned int line_in1_l = as3514.regs[AS3514_LINE_IN1_L] & ~(1 << 5);
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/* LIN1_off - default */
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unsigned int audioset1 = as3514.regs[AS3514_AUDIOSET1] & ~(1 << 2);
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if (enable) {
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source = SOURCE_LINE_IN1_ANALOG;
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/* LI1R_Mute_off */
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line_in1_r |= (1 << 5);
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/* LI1L_Mute_off */
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line_in1_l |= (1 << 5);
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/* LIN1_on */
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audioset1 |= (1 << 2);
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as3514_set(AS3514_AUDIOSET1, AUDIOSET1_LIN1_on);
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as3514_set(AS3514_LINE_IN1_R, LINE_IN1_R_LI1R_MUTE_off);
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as3514_set(AS3514_LINE_IN1_L, LINE_IN1_L_LI1L_MUTE_off);
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}
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else {
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as3514_clear(AS3514_AUDIOSET1, AUDIOSET1_LIN1_on);
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as3514_clear(AS3514_LINE_IN1_R, LINE_IN1_R_LI1R_MUTE_off);
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as3514_clear(AS3514_LINE_IN1_L, LINE_IN1_L_LI1L_MUTE_off);
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}
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as3514_write(AS3514_AUDIOSET1, audioset1);
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as3514_write(AS3514_LINE_IN1_R, line_in1_r);
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as3514_write(AS3514_LINE_IN1_L, line_in1_l);
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/* Sync mixer volume */
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audiohw_set_master_vol(as3514.vol_l, as3514.vol_r);
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@ -78,6 +78,158 @@ extern void audiohw_set_sample_rate(int sampling_control);
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#define VOLUME_MIN -735
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#define VOLUME_MAX 60
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/*** Audio Registers ***/
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/* 00h (LINE_OUT_R) to 1Dh (PLLMODE) */
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#define AS3514_NUM_AUDIO_REGS (0x1e)
|
||||
|
||||
/* Common registers masks */
|
||||
#define AS3514_VOL_MASK (0x1f << 0)
|
||||
|
||||
/* LINE_OUT_R (0x00) */
|
||||
/* Only has volume control bits */
|
||||
|
||||
/* LINE_OUT_L (0x01) */
|
||||
#define LINE_OUT_L_LO_SES_DM (0x3 << 6)
|
||||
#define LINE_OUT_L_LO_SES_DM_MUTE (0x0 << 6)
|
||||
#define LINE_OUT_L_LO_SES_DM_DF_MO (0x1 << 6)
|
||||
#define LINE_OUT_L_LO_SES_DM_SE_ST (0x2 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* HPH_OUT_R (0x02) */
|
||||
#define HPH_OUT_R_HP_OVC_TO (0x3 << 6)
|
||||
#define HPH_OUT_R_HP_OVC_TO_0MS (0x3 << 6)
|
||||
#define HPH_OUT_R_HP_OVC_TO_128MS (0x1 << 6)
|
||||
#define HPH_OUT_R_HP_OVC_TO_256MS (0x0 << 6)
|
||||
#define HPH_OUT_R_HP_OVC_TO_512MS (0x2 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* HPH_OUT_L (0x03) */
|
||||
#define HPH_OUT_L_HP_MUTE (0x1 << 7)
|
||||
#define HPH_OUT_L_HP_ON (0x1 << 6)
|
||||
#define HPH_OUT_L_HP_DET_ON (0x1 << 5)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* LSP_OUT_R (0x04) */
|
||||
#define LSP_OUT_R_SP_OVC_TO (0x3 << 6)
|
||||
#define LSP_OUT_R_SP_OVC_TO_256MS (0x0 << 6)
|
||||
#define LSP_OUT_R_SP_OVC_TO_128MS (0x1 << 6)
|
||||
#define LSP_OUT_R_SP_OVC_TO_512MS (0x2 << 6)
|
||||
#define LSP_OUT_R_SP_OVC_TO_0MS (0x3 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* LSP_OUT_L (0x05) */
|
||||
#define LSP_OUT_L_SP_MUTE (0x1 << 7)
|
||||
#define LSP_OUT_L_SP_ON (0x1 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* MIC1_R (0x06) */
|
||||
#define MIC1_R_M1_AGC_off (0x1 << 7)
|
||||
#define MIC1_R_M1_GAIN (0x3 << 5)
|
||||
#define MIC1_R_M1_GAIN_28DB (0x0 << 5)
|
||||
#define MIC1_R_M1_GAIN_34DB (0x1 << 5)
|
||||
#define MIC1_R_M1_GAIN_40DB (0x2 << 5)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* MIC1_L (0x07) */
|
||||
#define MIC1_L_M1_SUP_off (0x1 << 7)
|
||||
#define MIC1_L_M1_MUTE_off (0x1 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* MIC2_R (0x08) */
|
||||
#define MIC2_R_M2_AGC_off (0x1 << 7)
|
||||
#define MIC2_R_M2_GAIN (0x3 << 5)
|
||||
#define MIC2_R_M2_GAIN_28DB (0x0 << 5)
|
||||
#define MIC2_R_M2_GAIN_34DB (0x1 << 5)
|
||||
#define MIC2_R_M2_GAIN_40DB (0x2 << 5)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* MIC2_L (0x09) */
|
||||
#define MIC2_L_M2_SUP_off (0x1 << 7)
|
||||
#define MIC2_L_M2_MUTE_off (0x1 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* LINE_IN1_R (0Ah) */
|
||||
#define LINE_IN1_R_LI1R_MUTE_off (0x1 << 5)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* LINE_IN1_L (0Bh) */
|
||||
#define LINE_IN1_L_LI1_MODE (0x3 << 6)
|
||||
#define LINE_IN1_L_LI1_MODE_SE_ST (0x0 << 6)
|
||||
#define LINE_IN1_L_LI1_MODE_DF_MO (0x1 << 6)
|
||||
#define LINE_IN1_L_LI1_MODE_SE_MO (0x2 << 6)
|
||||
#define LINE_IN1_L_LI1L_MUTE_off (0x1 << 5)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* LINE_IN2_R (0Ch) */
|
||||
#define LINE_IN2_R_LI2R_MUTE_off (0x1 << 5)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* LINE_IN2_L (0Dh) */
|
||||
#define LINE_IN2_L_LI2_MODE (0x3 << 6)
|
||||
#define LINE_IN2_L_LI2_MODE_SE_ST (0x0 << 6)
|
||||
#define LINE_IN2_L_LI2_MODE_DF_MO (0x1 << 6)
|
||||
#define LINE_IN2_L_LI2_MODE_SE_MO (0x2 << 6)
|
||||
#define LINE_IN2_L_LI2L_MUTE_off (0x1 << 5)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* DAC_R (0Eh) */
|
||||
/* Only has volume control bits */
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* DAC_L (0Fh) */
|
||||
#define DAC_L_DAC_MUTE_off (0x1 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* ADC_R (10h) */
|
||||
#define ADC_R_ADCMUX (0x3 << 6)
|
||||
#define ADC_R_ADCMUX_ST_MIC (0x0 << 6)
|
||||
#define ADC_R_ADCMUX_LINE_IN1 (0x1 << 6)
|
||||
#define ADC_R_ADCMUX_LINE_IN2 (0x2 << 6)
|
||||
#define ADC_R_ADCMUX_AUDIO_SUM (0x3 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* ADC_L (11h) */
|
||||
#define ADC_L_FS_2 (0x1 << 7)
|
||||
#define ADC_L_ADC_MUTE_off (0x1 << 6)
|
||||
/* Use AS3514_VOL_MASK */
|
||||
|
||||
/* AUDIOSET1 (14h)*/
|
||||
#define AUDIOSET1_ADC_on (0x1 << 7)
|
||||
#define AUDIOSET1_SUM_on (0x1 << 6)
|
||||
#define AUDIOSET1_DAC_on (0x1 << 5)
|
||||
#define AUDIOSET1_LOUT_on (0x1 << 4)
|
||||
#define AUDIOSET1_LIN2_on (0x1 << 3)
|
||||
#define AUDIOSET1_LIN1_on (0x1 << 2)
|
||||
#define AUDIOSET1_MIC2_on (0x1 << 1)
|
||||
#define AUDIOSET1_MIC1_on (0x1 << 0)
|
||||
|
||||
/* AUDIOSET2 (15h) */
|
||||
#define AUDIOSET2_BIAS_off (0x1 << 7)
|
||||
#define AUDIOSET2_DITH_off (0x1 << 6)
|
||||
#define AUDIOSET2_AGC_off (0x1 << 5)
|
||||
#define AUDIOSET2_IBR_DAC (0x3 << 3)
|
||||
#define AUDIOSET2_IBR_DAC_0 (0x0 << 3)
|
||||
#define AUDIOSET2_IBR_DAC_25 (0x1 << 3)
|
||||
#define AUDIOSET2_IBR_DAC_40 (0x2 << 3)
|
||||
#define AUDIOSET2_IBR_DAC_50 (0x3 << 3)
|
||||
#define AUDIOSET2_LSP_LP (0x1 << 2)
|
||||
#define AUDIOSET2_IBR_LSP (0x3 << 0)
|
||||
#define AUDIOSET2_IBR_LSP_0 (0x0 << 0)
|
||||
#define AUDIOSET2_IBR_LSP_17 (0x1 << 0)
|
||||
#define AUDIOSET2_IBR_LSP_34 (0x2 << 0)
|
||||
#define AUDIOSET2_IBR_LSP_50 (0x3 << 0)
|
||||
|
||||
/* AUDIOSET3 (16h) */
|
||||
#define AUDIOSET3_ZCU_off (0x1 << 2)
|
||||
#define AUDIOSET3_IBR_HPH (0x1 << 1)
|
||||
#define AUDIOSET3_HPCM_off (0x1 << 0)
|
||||
|
||||
/* PLLMODE (1Dh) */
|
||||
#define PLLMODE_LRCK (0x3 << 1)
|
||||
#define PLLMODE_LRCK_24_48 (0x0 << 1)
|
||||
#define PLLMODE_LRCK_8_23 (0x2 << 1)
|
||||
|
||||
/* ADC channels */
|
||||
#define NUM_ADC_CHANNELS 13
|
||||
|
||||
|
|
|
|||
|
|
@ -39,10 +39,6 @@ void audiohw_init(void)
|
|||
DEV_INIT1 &=~0x3000000;
|
||||
/*mini2?*/
|
||||
|
||||
/* device reset */
|
||||
DEV_RS |= DEV_I2S;
|
||||
DEV_RS &=~DEV_I2S;
|
||||
|
||||
/* I2S device reset */
|
||||
DEV_RS |= DEV_I2S;
|
||||
DEV_RS &=~DEV_I2S;
|
||||
|
|
@ -56,11 +52,27 @@ void audiohw_init(void)
|
|||
/* external dev clock to 24MHz */
|
||||
outl(inl(0x70000018) & ~0xc, 0x70000018);
|
||||
|
||||
#ifdef SANSA_E200
|
||||
/* Prevent pops on startup */
|
||||
GPIOG_ENABLE |= 0x08;
|
||||
GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, 0x08);
|
||||
GPIOG_OUTPUT_EN |= 0x08;
|
||||
#endif
|
||||
|
||||
i2s_reset();
|
||||
|
||||
audiohw_preinit();
|
||||
}
|
||||
|
||||
void audiohw_postinit(void)
|
||||
void ascodec_supressor_on(bool on)
|
||||
{
|
||||
}
|
||||
#ifdef SANSA_E200
|
||||
if (on) {
|
||||
/* Set pop prevention */
|
||||
GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, 0x08);
|
||||
} else {
|
||||
/* Release pop prevention */
|
||||
GPIO_CLEAR_BITWISE(GPIOG_OUTPUT_VAL, 0x08);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -59,6 +59,8 @@ static inline void ascodec_unlock(void)
|
|||
i2c_unlock();
|
||||
}
|
||||
|
||||
extern void ascodec_supressor_on(bool on);
|
||||
|
||||
#endif /* CPU_PP */
|
||||
|
||||
#endif /* !_ASCODEC_TARGET_H */
|
||||
|
|
|
|||
|
|
@ -374,7 +374,7 @@ void pcm_play_dma_init(void)
|
|||
audiohw_init();
|
||||
|
||||
#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) && !defined(HAVE_WM8975) \
|
||||
&& !defined(HAVE_WM8758)
|
||||
&& !defined(HAVE_WM8758) && !defined(HAVE_AS3514)
|
||||
/* Power on */
|
||||
audiohw_enable_output(true);
|
||||
/* Unmute the master channel (DAC should be at zero point now). */
|
||||
|
|
|
|||
Loading…
Reference in a new issue