SPC Codec: Add ARMv5 optimized code. Easy peasy.
Why? Why not? Cuts a few MHz. Change-Id: Ied5c70b1aedd255cbe5d42b7d3028bbe47aad01d
This commit is contained in:
Michael Sevakis
parent
7738660eff
commit
33f3af2b8d
4 changed files with 291 additions and 1 deletions
238
lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.c
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238
lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.c
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@ -0,0 +1,238 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2013 Michael Sevakis (jhMikeS)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#if !SPC_NOINTERP
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#define SPC_GAUSSIAN_FAST_INTERP
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static inline int gaussian_fast_interp( int16_t const* samples,
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int32_t position,
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int16_t const* fwd,
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int16_t const* rev )
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{
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int output;
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int t0, t1, t2, t3;
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asm volatile (
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"ldrh %[t0], [%[samp]] \n" /* t0=s0 */
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"ldrh %[t2], [%[fwd]] \n" /* t2=f0 */
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"ldrh %[t1], [%[samp], #2] \n" /* t1=s1 */
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"ldrh %[t3], [%[fwd], #2] \n" /* r3=f1 */
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"smulbb %[out], %[t0], %[t2] \n" /* out=s0*f0 */
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"ldrh %[t2], [%[rev], #2] \n" /* r2=r1 */
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"ldrh %[t0], [%[samp], #4] \n" /* t0=s2 */
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"smlabb %[out], %[t1], %[t3], %[out] \n" /* out+=s1*f1 */
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"ldrh %[t3], [%[rev]] \n" /* t3=r0 */
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"ldrh %[t1], [%[samp], #6] \n" /* t1=s3 */
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"smlabb %[out], %[t0], %[t2], %[out] \n" /* out+=s2*r1 */
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"smlabb %[out], %[t1], %[t3], %[out] \n" /* out+=s3*r0 */
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: [out]"=&r"(output),
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[t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3)
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: [fwd]"r"(fwd), [rev]"r"(rev),
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[samp]"r"(samples + (position >> 12)));
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return output;
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}
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#define SPC_GAUSSIAN_FAST_AMP
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static inline int gaussian_fast_amp( struct voice_t* voice, int output,
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int* amp_0, int* amp_1 )
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{
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asm volatile (
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"mov %[out], %[out], asr #15 \n"
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"smulbb %[out], %[out], %[envx] \n"
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: [out]"+r"(output)
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: [envx]"r"(voice->envx));
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asm volatile (
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"mov %[out], %[out], asr #11 \n"
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"smulbb %[a0], %[out], %[v0] \n"
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"smulbb %[a1], %[out], %[v1] \n"
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: [out]"+r"(output),
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[a0]"=&r"(*amp_0), [a1]"=r"(*amp_1)
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: [v0]"r"(voice->volume [0]),
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[v1]"r"(voice->volume [1]));
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return output;
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}
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#define SPC_GAUSSIAN_SLOW_INTERP
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static inline int gaussian_slow_interp( int16_t const* samples,
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int32_t position,
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int16_t const* fwd,
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int16_t const* rev )
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{
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int output;
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int t0, t1, t2, t3;
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asm volatile (
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"ldrsh %[t0], [%[samp]] \n" /* t0=s0 */
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"ldrh %[t2], [%[fwd]] \n" /* t2=f0 */
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"ldrsh %[t1], [%[samp], #2] \n" /* t1=s1 */
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"ldrh %[t3], [%[fwd], #2] \n" /* t3=f1 */
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"smulwb %[out], %[t0], %[t2] \n" /* out=s0*f0>>16 */
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"ldrsh %[t0], [%[samp], #4] \n" /* t0=s2 */
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"ldrh %[t2], [%[rev], #2] \n" /* t2=r1 */
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"smlawb %[out], %[t1], %[t3], %[out] \n" /* out+=s1*f1>>16 */
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"ldrsh %[t1], [%[samp], #6] \n" /* t1=s3 */
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"ldrh %[t3], [%[rev]] \n" /* t3=r0 */
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"smlawb %[out], %[t0], %[t2], %[out] \n" /* out+=s2*r1>>16 */
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"smulwb %[t0], %[t1], %[t3] \n" /* t0=s3*r0>>16 */
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"mov %[out], %[out], asl #17 \n" /* out=(int16_t)(out*2) */
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"mov %[t0], %[t0], asl #1 \n" /* out+=t0*2 */
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"add %[out], %[t0], %[out], asr #16 \n"
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: [out]"=&r"(output),
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[t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3)
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: [fwd]"r"(fwd), [rev]"r"(rev),
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[samp]"r"(samples + (position >> 12)));
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return CLAMP16( output );
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}
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#define SPC_GAUSSIAN_SLOW_AMP
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static inline int gaussian_slow_amp( struct voice_t* voice, int output,
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int* amp_0, int* amp_1 )
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{
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asm volatile (
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"smulbb %[out], %[out], %[envx]"
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: [out]"+r"(output)
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: [envx]"r"(voice->envx));
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asm volatile (
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"mov %[out], %[out], asr #11 \n"
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"bic %[out], %[out], #0x1 \n"
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"smulbb %[a0], %[out], %[v0] \n"
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"smulbb %[a1], %[out], %[v1] \n"
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: [out]"+r"(output),
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[a0]"=&r"(*amp_0), [a1]"=r"(*amp_1)
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: [v0]"r"(voice->volume [0]), [v1]"r"(voice->volume [1]));
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return output;
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}
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#endif /* !SPC_NOINTERP */
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#if !SPC_NOECHO
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#define SPC_DSP_ECHO_APPLY
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/* Echo filter history */
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static int32_t fir_buf[FIR_BUF_CNT] IBSS_ATTR_SPC
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__attribute__(( aligned(FIR_BUF_ALIGN*1) ));
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static inline void echo_init( struct Spc_Dsp* this )
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{
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this->fir.ptr = fir_buf;
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ci->memset( fir_buf, 0, sizeof fir_buf );
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}
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static inline void echo_apply( struct Spc_Dsp* this, uint8_t *echo_ptr,
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int* out_0, int* out_1 )
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{
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/* Keep last 8 samples */
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int32_t* fir_ptr;
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int t0;
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asm volatile (
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"ldr %[t0], [%[ep]] \n"
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"add %[p], %[t_p], #4 \n"
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"bic %[t_p], %[p], %[mask] \n"
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"str %[t0], [%[p], #-4] \n"
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/* duplicate at +8 eliminates wrap checking below */
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"str %[t0], [%[p], #28] \n"
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: [p]"=&r"(fir_ptr), [t_p]"+r"(this->fir.ptr),
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[t0]"=&r"(t0)
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: [ep]"r"(echo_ptr), [mask]"i"(~FIR_BUF_MASK));
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int32_t* fir_coeff = (int32_t *)this->fir.coeff;
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asm volatile (
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"ldmia %[c]!, { r0-r1 } \n" /* C0C1-C2C3 = r0-r1 */
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"ldmia %[p]!, { r2-r5 } \n" /* L1R1-L4R4 = r2-r5 */
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"smulbb %[acc0], %[t0], r0 \n" /* acc0 = L0*C0 */
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"smultb %[acc1], %[t0], r0 \n" /* acc1 = R0*C0 */
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"smlabt %[acc0], r2, r0, %[acc0] \n" /* acc0 += L1*C1 */
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"smlatt %[acc1], r2, r0, %[acc1] \n" /* acc1 += R1*C1 */
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"smlabb %[acc0], r3, r1, %[acc0] \n" /* acc0 += L2*C2 */
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"smlatb %[acc1], r3, r1, %[acc1] \n" /* acc1 += R2*C2 */
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"smlabt %[acc0], r4, r1, %[acc0] \n" /* acc0 += L3*C3 */
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"smlatt %[acc1], r4, r1, %[acc1] \n" /* acc1 += R3*C3 */
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"ldmia %[c], { r0-r1 } \n" /* C4C5-C6C7 = r0-r1 */
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"ldmia %[p], { r2-r4 } \n" /* L5R5-L7R7 = r2-r5 */
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"smlabb %[acc0], r5, r0, %[acc0] \n" /* acc0 += L4*C4 */
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"smlatb %[acc1], r5, r0, %[acc1] \n" /* acc1 += R4*C4 */
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"smlabt %[acc0], r2, r0, %[acc0] \n" /* acc0 += L5*C5 */
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"smlatt %[acc1], r2, r0, %[acc1] \n" /* acc1 += R5*C5 */
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"smlabb %[acc0], r3, r1, %[acc0] \n" /* acc0 += L6*C6 */
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"smlatb %[acc1], r3, r1, %[acc1] \n" /* acc1 += R6*C6 */
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"smlabt %[acc0], r4, r1, %[acc0] \n" /* acc0 += L7*C7 */
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"smlatt %[acc1], r4, r1, %[acc1] \n" /* acc1 += R7*C7 */
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: [t0]"+r"(t0), [acc0]"=&r"(*out_0), [acc1]"=&r"(*out_1),
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[p]"+r"(fir_ptr), [c]"+r"(fir_coeff)
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:
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: "r0", "r1", "r2", "r3", "r4", "r5");
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}
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#define SPC_DSP_ECHO_FEEDBACK
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static inline void echo_feedback(struct Spc_Dsp* this, uint8_t* echo_ptr,
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int echo_0, int echo_1, int fb_0, int fb_1)
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{
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int e0, e1;
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asm volatile (
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"mov %[e0], %[ei0], asl #7 \n"
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"mov %[e1], %[ei1], asl #7 \n"
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"mla %[e0], %[fb0], %[ef], %[e0] \n"
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"mla %[e1], %[fb1], %[ef], %[e1] \n"
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: [e0]"=&r"(e0), [e1]"=&r"(e1)
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: [ei0]"r"(echo_0), [ei1]"r"(echo_1),
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[fb0]"r"(fb_0), [fb1]"r"(fb_1),
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[ef]"r"((int)this->r.g.echo_feedback));
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e0 = CLAMP16( e0 >> 14 );
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SET_LE16A( echo_ptr , e0 );
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e1 = CLAMP16( e1 >> 14 );
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SET_LE16A( echo_ptr + 2, e1 );
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}
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#define SPC_DSP_GENERATE_OUTPUT
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static inline void echo_output( struct Spc_Dsp* this, int global_muting,
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int global_vol_0, int global_vol_1, int chans_0, int chans_1,
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int fb_0, int fb_1, int* out_0, int* out_1 )
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{
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int t0, t1;
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asm volatile (
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"mul %[t0], %[gv0], %[ch0] \n"
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"mul %[t1], %[gv1], %[ch1] \n"
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: [t0]"=&r"(t0), [t1]"=r"(t1)
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: [gv0]"r"(global_vol_0), [gv1]"r"(global_vol_1),
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[ch0]"r"(chans_0), [ch1]"r"(chans_1));
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asm volatile (
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"mla %[t0], %[i0], %[ev0], %[t0] \n"
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"mla %[t1], %[i1], %[ev1], %[t1] \n"
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: [t0]"+r"(t0), [t1]"+r"(t1)
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: [i0]"r"(fb_0), [i1]"r"(fb_1),
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[ev0]"r"((int)this->r.g.echo_volume_0),
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[ev1]"r"((int)this->r.g.echo_volume_1));
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asm volatile (
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"mov %[o0], %[t0], asr %[gm] \n"
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"mov %[o1], %[t1], asr %[gm] \n"
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: [o0]"=&r"(*out_0), [o1]"=r"(*out_1)
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: [t0]"r"(t0), [t1]"r"(t1),
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[gm]"r"(global_muting));
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}
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#endif /* SPC_NOECHO */
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30
lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h
Normal file
30
lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h
Normal file
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@ -0,0 +1,30 @@
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#if !SPC_NOINTERP
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/* Want scale optimized for smulw(y) */
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#define GAUSS_TABLE_SCALE 4
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#endif
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#if !SPC_NOECHO
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#define SPC_DSP_ECHO_APPLY
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enum
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{
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FIR_BUF_CNT = FIR_BUF_HALF * 2,
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FIR_BUF_SIZE = FIR_BUF_CNT * sizeof ( int32_t ),
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FIR_BUF_ALIGN = FIR_BUF_SIZE,
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FIR_BUF_MASK = ~((FIR_BUF_ALIGN / 2) | (sizeof ( int32_t ) - 1))
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};
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/* Echo filter structure embedded in struct Spc_Dsp */
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struct echo_filter
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{
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/* fir_buf [i + 8] == fir_buf [i], to avoid wrap checking in FIR code */
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int32_t* ptr;
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/* FIR history is interleaved with guard to eliminate wrap checking
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* when convolving.
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* |LR|LR|LR|LR|LR|LR|LR|LR|--|--|--|--|--|--|--|--| */
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/* copy of echo FIR constants as int16_t, loaded as int32 for
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* halfword, packed multiples */
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int16_t coeff [VOICE_COUNT];
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};
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#endif /* SPC_NOECHO */
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@ -82,6 +82,7 @@
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#define IBSS_ATTR_SPC IBSS_ATTR
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#define ICODE_ATTR_SPC ICODE_ATTR
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#define ICONST_ATTR_SPC ICONST_ATTR
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#define IDATA_ATTR_SPC IDATA_ATTR
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/* Not enough IRAM available to move further data to it. */
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#define IBSS_ATTR_SPC_LARGE_IRAM
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@ -90,6 +91,7 @@
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#define IBSS_ATTR_SPC
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#define ICODE_ATTR_SPC
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#define ICONST_ATTR_SPC
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#define IDATA_ATTR_SPC
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/* Not enough IRAM available to move further data to it. */
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#define IBSS_ATTR_SPC_LARGE_IRAM
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@ -97,6 +99,7 @@
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#define IBSS_ATTR_SPC IBSS_ATTR
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#define ICODE_ATTR_SPC ICODE_ATTR
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#define ICONST_ATTR_SPC ICONST_ATTR
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#define IDATA_ATTR_SPC IDATA_ATTR
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/* Not enough IRAM available to move further data to it. */
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#define IBSS_ATTR_SPC_LARGE_IRAM
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@ -104,6 +107,7 @@
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#define IBSS_ATTR_SPC IBSS_ATTR
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#define ICODE_ATTR_SPC ICODE_ATTR
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#define ICONST_ATTR_SPC ICONST_ATTR
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#define IDATA_ATTR_SPC IDATA_ATTR
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/* Very large IRAM. Move even more data to it. */
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#define IBSS_ATTR_SPC_LARGE_IRAM IBSS_ATTR
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@ -111,6 +115,7 @@
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#define IBSS_ATTR_SPC IBSS_ATTR
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#define ICODE_ATTR_SPC ICODE_ATTR
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#define ICONST_ATTR_SPC ICONST_ATTR
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#define IDATA_ATTR_SPC IDATA_ATTR
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/* Not enough IRAM available to move further data to it. */
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#define IBSS_ATTR_SPC_LARGE_IRAM
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#endif
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@ -318,6 +323,8 @@ struct Spc_Dsp;
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#if defined(CPU_ARM)
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#if ARM_ARCH >= 6
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#include "cpu/spc_dsp_armv6.h"
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#elif ARM_ARCH >= 5
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#include "cpu/spc_dsp_armv5.h"
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#else
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#include "cpu/spc_dsp_armv4.h"
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#endif
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@ -329,6 +336,10 @@ struct Spc_Dsp;
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function names. */
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#include "spc_dsp_generic.h"
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#if !SPC_NOINTERP && !defined (GAUSS_TABLE_SCALE)
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#define GAUSS_TABLE_SCALE 0
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#endif
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struct Spc_Dsp
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{
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union
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@ -32,6 +32,8 @@
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#if defined(CPU_ARM)
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#if ARM_ARCH >= 6
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#include "cpu/spc_dsp_armv6.c"
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#elif ARM_ARCH >= 5
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#include "cpu/spc_dsp_armv5.c"
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#else
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#include "cpu/spc_dsp_armv4.c"
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#endif
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@ -55,7 +57,7 @@ static unsigned short const env_rates [0x20] ICONST_ATTR_SPC =
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#if !SPC_NOINTERP
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/* Interleved gauss table (to improve cache coherency). */
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/* gauss [i * 2 + j] = normal_gauss [(1 - j) * 256 + i] */
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static int16_t const gauss_table [512] ICONST_ATTR_SPC MEM_ALIGN_ATTR =
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static int16_t gauss_table [512] IDATA_ATTR_SPC MEM_ALIGN_ATTR =
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{
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370,1305, 366,1305, 362,1304, 358,1304,
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354,1304, 351,1304, 347,1304, 343,1303,
|
||||
|
|
@ -956,6 +958,15 @@ void DSP_reset( struct Spc_Dsp* this )
|
|||
this->wave_entry [i].start_addr = 0xffff;
|
||||
#endif /* SPC_BRRCACHE */
|
||||
|
||||
#if !SPC_NOINTERP && GAUSS_TABLE_SCALE
|
||||
if (gauss_table[0] == 370)
|
||||
{
|
||||
/* Not yet scaled */
|
||||
for ( int i = 0; i < 512; i++)
|
||||
gauss_table[i] <<= GAUSS_TABLE_SCALE;
|
||||
}
|
||||
#endif /* !SPC_NOINTERP && GAUSS_TABLE_SCALE */
|
||||
|
||||
#if !SPC_NOECHO
|
||||
this->echo_pos = 0;
|
||||
echo_init(this);
|
||||
|
|
|
|||
Loading…
Reference in a new issue