Gmini i2c support

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5655 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jean-Philippe Bernardy 2005-01-24 14:40:10 +00:00
parent 34d2a71fdd
commit 33114cad25
2 changed files with 31 additions and 2 deletions

View file

@ -17,13 +17,34 @@
*
****************************************************************************/
#include "lcd.h"
#include "sh7034.h"
#include "cpu.h"
#include "kernel.h"
#include "thread.h"
#include "debug.h"
#include "system.h"
/* cute little functions, atomic read-modify-write */
#ifdef HAVE_GMINI_I2C
/* This is done like this in the Archos' firmware.
* However, the TCC370 has an integrated I2C
* controller (bound to the same lines). It should be
* possible to use it and thus save some space in flash.
*/
#define SDA_LO (P3 &= ~0x20)
#define SDA_HI (P3 |= 0x20)
#define SDA_INPUT (P3CONH &= ~0x0C)
#define SDA_OUTPUT (P3CONH |= 0x04)
#define SDA (P3 & 0x20)
#define SCL_LO (P3 &= ~0x10)
#define SCL_HI (P3 |= 0x10)
#define SCL_INPUT (P3CONH &= ~0x03)
#define SCL_OUTPUT (P3CONH |= 0x01)
#define SCL (P3 & 0x10)
#else
/* SDA is PB7 */
#define SDA_LO and_b(~0x80, &PBDRL)
#define SDA_HI or_b(0x80, &PBDRL)
@ -46,6 +67,7 @@
#define SCL_HI or_b(0x20, &PBDRH)
#define SCL (PBDR & 0x2000)
#endif
#endif
/* arbitrary delay loop */
#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
@ -84,6 +106,10 @@ void i2c_init(void)
{
int i;
#ifdef HAVE_GMINI_I2C
SCL_INPUT;
SDA_INPUT;
#else
#ifdef HAVE_ONDIO_I2C
/* make PB5, PB6 & PB7 general I/O */
PBCR2 &= ~0xfc00; /* includes PB5, see FIXME below */
@ -92,12 +118,13 @@ void i2c_init(void)
PBCR1 &= ~0x0c00; /* PB13 */
PBCR2 &= ~0xcc00; /* PB5 and PB7, see FIXME below */
#endif
/* PB5 is "MAS enable" (no I2C signal!). make it output and high */
/* FIXME: this is true only for Players, and should go into mas.c */
/* for Recorders, it shuts off the charger, for FM/V2 it holds power */
or_b(0x20, &PBIORL);
or_b(0x20, &PBDRL);
#endif
SCL_OUTPUT;
SDA_OUTPUT;

View file

@ -55,6 +55,8 @@
#define P2CONH MMIO(unsigned char,0x42)
#define P2CONL MMIO(unsigned char,0x43)
#define P3CON MMIO(unsigned int,0x44)
#define P3CONH MMIO(unsigned char,0x44)
#define P3CONL MMIO(unsigned char,0x45)
#define P3PUR MMIO(unsigned char,0x46)
#define P5CON MMIO(unsigned char,0x48)
#define P5PUR MMIO(unsigned char,0x49)