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Iriver recording: Always route the signals through the coldfire audio interface for monitoring. Advantages: (H1x0) Enables parallel analog and SPDIF monitoring of both analog or SPDIF sources. When recording from SPDIF, the SPDIF monitor signal is pure pass-through. (all) Digital clipping is now audible in the analog monitor signal.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@9918 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jens Arnold 2006-05-12 00:47:47 +00:00
parent 76b132629e
commit 2de6604e3a
1 changed files with 21 additions and 19 deletions
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40
firmware/pcm_record.c
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@ -80,10 +80,10 @@ static short peak_left, peak_right;
Total buffer size: 32 MB / 176 KB/s = 181s before writing to disk
*/
#define CHUNK_SIZE 8192 /* Multiple of 4 */
#define WRITE_THRESHOLD 250 /* (2 MB) Write when this many chunks (or less) until buffer full */
#define CHUNK_SIZE 8192 /* Multiple of 4 */
#define WRITE_THRESHOLD 250 /* (2 MB) Write when this many chunks (or less) until buffer full */
#define GET_CHUNK(x) (short*)(&rec_buffer[CHUNK_SIZE*(x)])
#define GET_CHUNK(x) (short*)(&rec_buffer[CHUNK_SIZE*(x)])
static unsigned int rec_buffer_offset;
static unsigned char *rec_buffer; /* Circular recording buffer */
@ -305,34 +305,36 @@ void audio_set_recording_options(int frequency, int quality,
case 2:
/* Int. when 6 samples in FIFO. PDIR2 source = ebu1RcvData */
DATAINCONTROL = 0xc038;
EBU1CONFIG = 0; /* Normal operation, source is EBU in 1 */
/* We can't use the EBU clock to drive the IIS interface, so we
* need to use the clock the UDA provides, which is 44.1kHz as of
* now. This is the reason S/PDIF monitoring distorts for all other
* sample rates. Enable record to enable clock gen.
*/
uda1380_enable_recording(true);
EBU1CONFIG = (1 << 2);
/* Input source is EBUin1, Feed-through to output for monitoring */
uda1380_disable_recording();
break;
#endif
}
sample_rate = frequency;
#ifdef HAVE_SPDIF_IN
/* Turn on UDA based monitoring when UDA is used as input. */
/* Monitoring: route the signals through the coldfire audio interface. */
IIS2CONFIG = 0x800; /* Reset before reprogram */
#ifdef HAVE_SPDIF_IN
if (source == 2) {
uda1380_set_monitor(false);
IIS2CONFIG = 0x800; /* Reset before reprogram */
/* SCLK follow IIS1 (UDA clock), TXSRC = EBU1rcv, 64 bclk/wclk */
IIS2CONFIG = (8 << 12) | (7 << 8) | (4 << 2);
/* SCLK2 = Audioclk/4 (can't use EBUin clock), TXSRC = EBU1rcv, 64 bclk/wclk */
IIS2CONFIG = (6 << 12) | (7 << 8) | (4 << 2);
/* S/PDIF feed-through already configured */
}
else
{
uda1380_set_monitor(true);
IIS2CONFIG = 0x800; /* Stop the S/PDIF monitoring if it's active */
/* SCLK2 follow IIS1 (UDA clock), TXSRC = IIS1rcv, 64 bclk/wclk */
IIS2CONFIG = (8 << 12) | (4 << 8) | (4 << 2);
EBU1CONFIG = 0x800; /* Reset before reprogram */
/* SCLK2, TXSRC = IIS1recv, validity, normal operation */
EBU1CONFIG = (7 << 12) | (4 << 8) | (1 << 5) | (5 << 2);
}
#else
uda1380_set_monitor(true);
/* SCLK2 follow IIS1 (UDA clock), TXSRC = IIS1rcv, 64 bclk/wclk */
IIS2CONFIG = (8 << 12) | (4 << 8) | (4 << 2);
#endif
}